74VHCT273A
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Table 7: DC Specifications
Table 8: AC Electrical Characteristics (Input t
r
= t
f
= 3ns)
(*) Voltage range is 5.0V ± 0.5V
Note 1: Parameter guaranteed by design. t
soLH
= |t
pLHm
- t
pLHn
|, t
soHL
= |t
pHLm
- t
pHLn
|
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
V
IH
High Level Input
Voltage
4.5 to
5.5
222V
V
IL
Low Level Input
Voltage
4.5 to
5.5
0.8 0.8 0.8 V
V
OH
High Level Output
Voltage
4.5
I
O
=-50 µA
4.4 4.5 4.4 4.4
V
4.5
I
O
=-8 mA
3.94 3.8 3.7
V
OL
Low Level Output
Voltage
4.5
I
O
=50 µA
0.0 0.1 0.1 0.1
V
4.5
I
O
=8 mA
0.36 0.44 0.55
I
I
Input Leakage
Current
0 to
5.5
V
I
= 5.5V or GND
± 0.1 ± 1.0 ± 1.0 µA
I
CC
Quiescent Supply
Current
5.5
V
I
= V
CC
or GND
44040µA
+I
CC
Additional Worst
Case Supply
Current
5.5
One Input at 3.4V,
other input at V
CC
or GND
1.35 1.5 1.5 mA
I
OPD
Output Leakage
Current
0
V
OUT
= 5.5V
0.5 5.0 5.0 µA
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
t
PLH
t
PHL
Propagation Delay
Time CLOCK to Q
5.0
(**)
15 5.8 8.2 1.0 10.0 1.0 10.0
ns
5.0
(**)
50 6.8 9.2 1.0 11.0 1.0 11.0
t
PHL
Propagation Delay
Time CLEAR
to Q
5.0
(**)
15 7.5 10.0 1.0 11.6 1.0 11.6
ns
5.0
(**)
50 8.5 11.0 1.0 12.6 1.0 12.6
t
W
CLR Pulse Width
LOW
5.0
(**)
5.0 5.0 5.0 ns
t
W
CK Pulse Width
HIGH or LOW
5.0
(**)
5.0 5.0 5.0 ns
t
s
Setup Time D to
CLOCK, HIGH or
LOW
5.0
(**)
2.0 2.0 2.0 ns
t
h
Hold Time D to CK,
HIGH or LOW
5.0
(**)
2.0 2.0 2.0 ns
t
REM
Removal Time CLR
to CLOCK
5.0
(**)
1.0 1.0 1.0 ns
f
MAX
Maximum Clock
Frequency
5.0
(**)
15 75 170 65 65
MHz
5.0
(**)
50 50 160 45 45
t
OSLH
t
OSHL
Output to Output
Skew time (note 1)
5.0
(**)
50 1.0 1.0 1.0 ns
74VHCT273A
5/13
Table 9: Capacitive Characteristics
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/8 (per
Flip-Flop)
Table 10: Dynamic Switching Characteristics
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.0V. Inputs under test switching: 3.0V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
Figure 3: Test Circuit
C
L
=15/50pF or equivalent (includes jig and probe capacitance)
R
T
= Z
OUT
of pulse generator (typically 50)
Symbol Parameter
Test Condition Value
Unit
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
C
IN
Input Capacitance
610 10 10pF
C
PD
Power Dissipation
Capacitance
(note 1)
16 pF
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
V
OLP
Dynamic Low
Voltage Quiet
Output (note 1, 2)
5.0
C
L
= 50 pF
0.6 0.9
V
V
OLV
-0.9 -0.6
V
IHD
Dynamic High
Voltage Input
(note 1, 3)
5.0 2.0
V
ILD
Dynamic Low
Voltage Input
(note 1, 3)
5.0 0.8
74VHCT273A
6/13
Figure 4: Waveform - Propagation Delays, Setup And Hold Times (f=1MHz; 50% duty cycle)
Figure 5: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)

74VHCT273ATTR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
IC FF D-TYPE SNGL 8BIT 20TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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