Data Sheet AD8067
Rev. B | Page 5 of 24
SPECIFICATIONS FOR ±12 V
V
S
= ±12 V (@ T
A
= +25°C, G = +10, R
L
= R
F
= 1 kΩ, unless otherwise noted.)
Table 3.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
3 dB Bandwidth V
O
= 0.2 V p-p 39 54 MHz
V
O
= 2 V p-p 53 MHz
Bandwidth for 0.1 dB Flatness V
O
= 0.2 V p-p 8 MHz
Output Overdrive Recovery Time (Pos/Neg) V
I
= ±1.5 V 75/180 ns
Slew Rate V
O
= 5 V step 500 640 V/µs
Settling Time to 0.1%
V
O
= 5 V step
27
ns
NOISE/DISTORTION PERFORMANCE
Spurious-Free Dynamic Range (SFDR)
f
C
= 1 MHz, 2 V p-p
92
dBc
f
C
= 1 MHz, 20 V p-p 84 dBc
f
C
= 5 MHz, 2 V p-p 74 dBc
f
C
= 1 MHz, 2 V p-p, R
L
= 150 72 dBc
Input Voltage Noise f = 10 kHz 6.6 nV/Hz
Input Current Noise f = 10 kHz 0.6 fA/Hz
DC PERFORMANCE
Input Offset Voltage 0.2 1.0 mV
Input Offset Voltage Drift 1 15 µV/°C
Input Bias Current 1.0 5 pA
T
MIN
to T
MAX
25 pA
Input Offset Current 0.2 1 pA
Open-Loop Gain V
O
= ±10 V 107 119 dB
INPUT CHARACTERISTICS
Common-Mode Input Impedance 1000||1.5 GΩ||pF
Differential Input Impedance 1000||2.5 GΩ||pF
Input Common-Mode Voltage Range 12.0 +9.0 V
Common-Mode Rejection Ratio (CMRR) V
CM
= 1 V to +1 V 89 108 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing R
L
= 1 kΩ 11.70 to +11.70 11.85 to +11.84 V
R
L
= 500 Ω 11.31 to +11.73 V
Output Current SFDR > 60 dBc, f = 1 MHz 26 mA
Short Circuit Current 125 mA
Capacitive Load Drive 30% overshoot 120 pF
POWER SUPPLY
Operating Range 5 24 V
Quiescent Current 6.6 7.0 mA
Power Supply Rejection Ratio (PSRR) 86 97 dB
AD8067 Data Sheet
Rev. B | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
Supply Voltage 26.4 V
Power Dissipation See Figure 3
Common-Mode Input Voltage V
EE
0.5 V to V
CC
+ 0.5 V
Differential Input Voltage 1.8 V
Storage Temperature Range 65°C to +125°C
Operating Temperature Range
40°C to +85°C
Lead Temperature (Soldering 10 sec) 300°C
Junction Temperature 150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The associated raise in junction temperature (T
J
) on the die
limits the maximum safe power dissipation in the AD8067
package. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the AD8067. Exceeding a junction temperature
of 175°C for an extended period can result in changes in the
silicon devices, potentially causing failure.
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the
voltage between the supply pins (V
S
) times the quiescent
current (I
S
). Assuming the load (R
L
) is referenced to midsupply,
the total drive power is V
S
/2 × I
OUT
, some of which is dissipated
in the package and some in the load (V
OUT
× I
OUT
). The
difference between the total drive power and the load power is
the drive power dissipated in the package. RMS output voltages
should be considered.
P
D
= Quiescent Power + (Total Drive PowerLoad Power)
( )
L
OUT
L
OUTS
SS
D
R
V
R
V
V
IVP
2
2
×
+×=
If R
L
is referenced to V
S−
as in single-supply operation, then the
total drive power is V
S
× I
OUT
.
If the rms signal levels are indeterminate, then consider the
worst case, when V
OUT
= V
S
/4 for R
L
to midsupply:
( )
( )
L
S
SS
D
R
V
IVP
2
4/
+×=
In single-supply operation with R
L
referenced to V
S−
, worst case
is V
OUT
= V
S
/2.
Airflow increases heat dissipation effectively, reducing θ
JA
. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θ
JA
.
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the SOT-23-5
(180°C/W) package on a JEDEC standard 4-layer board. θ
JA
values are approximations.
It should be noted that for every 10°C rise in temperature, I
B
approximately doubles (see Figure 22).
–40
2.0
1.5
0.5
0
0
AMBIENT TEMPERATURE – °C
MAXIMUM POWER DISSIPATION– W
1.0
–30 –20 –10 8010 20 30 40 50 60 70
SOT-23-5
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occu
r on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Data Sheet AD8067
Rev. B | Page 7 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
Default Conditions: V
S
= ±5 V (@ T
A
= +25°C, G = +10, R
L
= R
F
= 1 kΩ, unless otherwise noted.)
FREQUENCY – MHz
GAIN – dB
28
8
10
12
14
16
18
20
22
24
26
1 10 100
G = +20
G = +10
G = +6
G = +8
V
OUT
= 200mV p-p
Figure 4. Small Signal Frequency Response for Various Gains
FREQUENCY – MHz
GAIN – dB
22
14
15
16
17
18
19
20
21
1 10 100
V
OUT
= 200mV p-p
V
S
= ±12V
V
S
= ±5V
V
S
= +5V
Figure 5. Small Signal Frequency Response for Various Supplies
FREQUENCY – MHz
GAIN – dB
22
14
15
16
17
18
19
20
21
1 10 100
V
OUT
= 2V p-p
V
S
= ±12V
V
S
= ±5V
V
S
= +5V
Figure 6. Large Signal Frequency Response for Various Supplies
FREQUENCY – MHz
GAIN – dB
20.7
19.8
19.9
20.0
20.1
20.2
20.3
20.4
20.5
20.6
1 10 100
V
OUT
= 0.2V p-p
V
OUT
= 0.7V p-p
V
OUT
= 1.4V p-p
Figure 7. 0.1 dB Flatness Frequency Response
FREQUENCY – MHz
GAIN – dB
24
14
15
16
17
18
19
20
21
22
23
1 10 100
V
OUT
= 200mV p-p
C
L
= 100pF
C
L
= 25pF
C
L
= 100pF
R
SNUB
= 24.9
C
L
= 5pF
Figure 8. Small Signal Frequency Response for Various C
LOAD
FREQUENCY – MHz
GAIN – dB
22
14
15
16
17
18
19
20
21
1 10 100
V
OUT
= 0.2V p-p, 2V p-p
V
OUT
= 4V p-p
Figure 9. Frequency Response for Various Output Amplitudes

AD8067ARTZ-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers High Gain BW Prec IC
Lifecycle:
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