ADuM1200-EP Data Sheet
Rev. B | Page 4 of 16
Parameter Symbol Min Typ Max Unit Test Conditions
Dynamic Supply Current per
Channel
8
Input I
DDI (D)
0.19
mA/
Mbps
Output I
DDO (D)
0.05
mA/
Mbps
1
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present.
2
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4
t
PHL
propagation delay is measured from the 50% level of the falling edge of the V
Ix
signal to the 50% level of the falling edge of the V
Ox
signal. t
PLH
propagation delay is
measured from the 50% level of the rising edge of the V
Ix
signal to the 50% level of the rising edge of the V
Ox
signal.
5
t
PSK
is the magnitude of the worst-case difference in t
PHL
and/or t
PLH
that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CM
H
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
Ox
> 0.8 V
DD2
. CM
L
is the maximum common-mode voltage slew rate
that can be sustained while maintaining V
Ox
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The
transient magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate.
Data Sheet ADuM1200-EP
Rev. B | Page 5 of 16
ELECTRICAL CHARACTERISTICS3 V OPERATION
All voltages are relative to their respective ground; 3.0 V ≤ V
DD1
≤ 3.6 V, 3.0 V ≤ V
DD2
≤ 3.6 V; all minimum/maximum specifications apply
over the entire recommended operating range, unless otherwise noted; all typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 3 V.
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
I
DDI (Q)
0.26 0.35 mA
Output Supply Current per Channel,
Quiescent
I
DDO (Q)
0.11 0.20 mA
Total Supply Current, Two Channels
1
DC to 2 Mbps
V
DD1
Supply Current I
DD1 (Q)
0.6 1.0 mA DC to 1 MHz logic signal frequency
V
DD2
Supply Current I
DD2 (Q)
0.2 0.6 mA DC to 1 MHz logic signal frequency
10 Mbps
V
DD1
Supply Current I
DD1 (Q)
2.2 3.4 mA 5 MHz logic signal frequency
V
DD2
Supply Current I
DD2 (Q)
0.7 1.1 mA 5 MHz logic signal frequency
25 Mbps
V
DD1
Supply Current I
DD1 (Q)
5.2 7.7 mA 12.5 MHz logic signal frequency
V
DD2
Supply Current I
DD2 (Q)
1.5 2.0 mA 12.5 MHz logic signal frequency
Input Currents I
IA
, I
IB
10 +0.01 +10 µA
Logic High Input Threshold V
IH
0.7 (V
DD1
or V
DD2
) V
Logic Low Input Threshold V
IL
0.3 (V
DD1
or V
DD2
) V
Logic High Output Voltages V
OAH
, V
OBH
(V
DD1
or V
DD2
) − 0.1 3.0 V I
Ox
= −20 µA, V
Ix
= V
IxH
(V
DD1
or V
DD2
) − 0.5 2.8 V I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OAL
, V
OBL
0.0 0.1 V I
Ox
= 20 µA, V
Ix
= V
IxL
0.04 0.1 V I
Ox
= 400 µA, V
Ix
= V
IxL
0.2 0.4 V I
Ox
= 4 mA, V
Ix
= V
IxL
SWITCHING SPECIFICATIONS
Minimum Pulse Width
2
PW 20 40 ns
Maximum Data Rate
3
25 50 Mbps
Propagation Delay
4
t
PHL
, t
PLH
20 55 ns
Pulse Width Distortion, |t
PLH
− t
PHL
|
4
PWD 3 ns
Propagation Delay Skew
5
t
PSK
16 ns
Channel-to-Channel Matching
6
t
PSKCD
/t
PSKOD
3 ns
Output Rise/Fall Time (10% to 90%) t
R
/t
F
2.5 ns
Common-Mode Transient Immunity
Logic High Output
7
|CM
H
| 25 35 kV/µs V
Ix
= V
DD1
, V
DD2
, V
CM
= 1000 V,
transient magnitude = 800 V
Logic Low Output
7
|CM
L
| 25 35 kV/µs V
Ix
= 0 V, V
CM
= 1000 V,
transient magnitude = 800 V
Refresh Rate f
r
1.1 Mbps
Dynamic Supply Current per Channel
8
Input I
DDI (D)
0.10 mA/
Mbps
Output I
DDO (D)
0.03 mA/
Mbps
1
The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present.
2
The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.
3
The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.
4
t
PHL
propagation delay is measured from the 50% level of the falling edge of the V
Ix
signal to the 50% level of the falling edge of the V
Ox
signal. t
PLH
propagation delay is
measured from the 50% level of the rising edge of the V
Ix
signal to the 50% level of the rising edge of the V
Ox
signal.
5
t
PSK
is the magnitude of the worst-case difference in t
PHL
and/or t
PLH
that is measured between units at the same operating temperature, supply voltages, and output
load within the recommended operating conditions.
6
Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with
inputs on opposing sides of the isolation barrier.
7
CM
H
is the maximum common-mode voltage slew rate that can be sustained while maintaining V
Ox
> 0.8 V
DD2
. CM
L
is the maximum common-mode voltage slew rate
that can be sustained while maintaining V
Ox
< 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The
transient magnitude is the range over which the common mode is slewed.
8
Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate.
ADuM1200-EP Data Sheet
Rev. B | Page 6 of 16
ELECTRICAL CHARACTERISTICSMIXED 5 V/3 V OR 3 V/5 V OPERATION
All voltages are relative to their respective ground; 5 V/3 V operation: 4.5 V ≤ V
DD1
≤ 5.5 V, 3.0 V ≤ V
DD2
≤ 3.6 V. 3 V/5 V operation: 3.0 V
≤ V
DD1
≤ 3.6 V, 4.5 V ≤ V
DD2
≤ 5.5 V; all minimum/maximum specifications apply over the entire recommended operating range, unless
otherwise noted; all typical specifications are at T
A
= 25°C, V
DD1
= 3.0 V, V
DD2
= 5.0 V; or V
DD1
= 5.0 V, V
DD2
= 3.0 V.
Table 3.
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Input Supply Current per Channel,
Quiescent
I
DDI (Q)
5 V/3 V Operation 0.50 0.6 mA
3 V/5 V Operation 0.26 0.35 mA
Output Supply Current per Channel,
Quiescent
I
DDO (Q)
5 V/3 V Operation 0.11 0.20 mA
3 V/5 V Operation 0.19 0.25 mA
Total Supply Current, Two Channels
1
DC to 2 Mbps
V
DD1
Supply Current I
DD1 (Q)
5 V/3 V Operation 1.1 1.4 mA DC to 1 MHz logic signal frequency
3 V/5 V Operation 0.6 1.0 mA DC to 1 MHz logic signal frequency
V
DD2
Supply Current I
DD2 (Q)
5 V/3 V Operation 0.2 0.6 mA DC to 1 MHz logic signal frequency
3 V/5 V Operation 0.5 0.8 mA DC to 1 MHz logic signal frequency
10 Mbps
V
DD1
Supply Current I
DD1 (Q)
5 V/3 V Operation 4.3 5.5 mA 5 MHz logic signal frequency
3 V/5 V Operation 2.2 3.4 mA 5 MHz logic signal frequency
V
DD2
Supply Current I
DD2 (Q)
5 V/3 V Operation 0.7 1.1 mA 5 MHz logic signal frequency
3 V/5 V Operation 1.3 2.0 mA 5 MHz logic signal frequency
25 Mbps
V
DD1
Supply Current I
DD1 (Q)
5 V/3 V Operation 10 13 mA 12.5 MHz logic signal frequency
3 V/5 V Operation 5.2 7.7 mA 12.5 MHz logic signal frequency
V
DD2
Supply Current I
DD2 (Q)
5 V/3 V Operation 1.5 2.0 mA 12.5 MHz logic signal frequency
3 V/5 V Operation 2.8 3.4 mA 12.5 MHz logic signal frequency
Input Currents I
IA
,I
IB
10 +0.01 +10 µA
Logic High Input Threshold V
IH
0.7 (V
DD1
or V
DD2
) V
Logic Low Input Threshold V
IL
0.3 (V
DD1
or V
DD2
) V
Logic High Output Voltages V
OAH
, V
OBH
(V
DD1
or V
DD2
) − 0.1 3.0 V I
Ox
= −20 µA, V
Ix
= V
IxH
(V
DD1
or V
DD2
) − 0.5 2.8 V I
Ox
= −4 mA, V
Ix
= V
IxH
Logic Low Output Voltages V
OAL
, V
OBL
0.0 0.1 V I
Ox
= 20 µA, V
Ix
= V
IxL
0.04 0.1 V I
Ox
= 400 µA, V
Ix
= V
IxL
0.2 0.4 V I
Ox
= 4 mA, V
Ix
= V
IxL
SWITCHING SPECIFICATIONS
Minimum Pulse Width
2
PW 20 40 ns
Maximum Data Rate
3
25 50 Mbps
Propagation Delay
4
t
PHL
, t
PLH
20 50 ns
Pulse Width Distortion, |t
PLH
− t
PHL
|
4
PWD 3 ns
Propagation Delay Skew
5
t
PSK
15 ns
Channel-to-Channel Matching
6
t
PSKCD
/t
PSKOD
3 ns
Output Rise/Fall Time (10% to 90%) t
R
/t
F
5 V/3 V Operation 3.0 ns
3 V/5 V Operation 2.5 ns

ADUM1200UR-EP-RL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital Isolators Digital Dual-CH EP
Lifecycle:
New from this manufacturer.
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