3
Absolute Maximum Ratings Thermal Information
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33V
Analog (V
IN
, V
OUT
) . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
Digital Input Voltage:
TTL Levels Selected (V
DD
/LLS Pin = GND or Open)
V
A0-1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to +6V
V
A2/SDS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V-) -2V to (V+) +2V
CMOS Levels Selected (V
DD
/LLS Pin = V
DD
)
V
A0-2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to (V+) +2V
Operating Conditions
Temperature Ranges
HI-518-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
HI-518-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 75
o
C
Thermal Resistance (Typical, Note 2). . . . θ
JA
(
o
C/W) θ
JC
(
o
C/W)
PDIP Package*. . . . . . . . . . . . . . . . . . . 90 N/A
CERDIP Package. . . . . . . . . . . . . . . . . 70 18
Maximum Junction Temperature
Ceramic Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175
o
C
Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
2. θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Supplies = +15V, -15V; V
AH
(Logic Level High) = 2.4V, V
AL
(Logic Level Low) = 0.8V; V
DD
/LLS = GND
(Note 3), Unless Otherwise Specified
PARAMETER
TEST
CONDITIONS
TEMP
(
o
C)
-8 -5
UNITSMIN TYP MAX MIN TYP MAX
DYNAMIC CHARACTERISTICS
Access Time, t
A
25 - 130 175 - 130 175 ns
Full--225--225ns
Break-Before-Make Delay, t
OPEN
25 10 20 - 10 20 - ns
Enable Delay (ON), t
ON(EN)
25 - 120 175 120 175 ns
Enable Delay (OFF), t
OFF(EN)
25 - 140 175 140 175 ns
Settling Time To 0.1% 25 - 250 - - 250 - ns
To 0.01% 25 - 800 - - 800 - ns
Charge Injection Error Note 6 25 - - 25 - - 25 mV
Off Isolation Note 7 25 45 - - 45 - - dB
Channel Input Capacitance, C
S(OFF)
25 - - 5 - - 5 pF
Channel Output Capacitance, C
D(OFF)
25 - - 10 - - 10 pF
Digital Input Capacitance, C
A
25 - - 5 - - 5 pF
Input to Output Capacitance, C
DS(OFF)
25 -0.02- -0.02- pF
DIGITAL INPUT CHARACTERISTICS
Input Low Threshold, V
AL
(TTL) Note 3 Full - - 0.8 - - 0.8 V
Input High Threshold, V
AH
(TTL) Note 3 Full 2.4 - - 2.4 - - V
Input Low Threshold, V
AL
(CMOS) Note 3 Full - - 0.3V
DD
- - 0.3V
DD
V
Input High Threshold, V
AH
(CMOS) Note 3 Full 0.7V
DD
- - 0.7V
DD
--V
Input Leakage Current, I
AH
(High) Full - - 1 - - 1 µA
Input Leakage Current, I
AL
(Low) Full - - 20 - - 20 µA
ANALOG CHANNEL CHARACTERISTICS
Analog Signal Range, V
IN
Note 4 Full -14 - +14 -15 - +15 V
On Resistance, r
ON
Note 5 25 - 480 750 - 480 750 Ω
Full - - 1,000 - - 1,000 Ω
Off Input Leakage Current, l
S(OFF)
25 -0.01- -0.01- nA
Full - - 50 - - 50 nA
Off Output Leakage Current, I
D(OFF)
25 - 0.015 - - 0.015 - nA
Full - - 50 - - 50 nA
On Channel Leakage Current, I
D(ON)
25 - 0.015 - - 0.015 - nA
Full - - 50 - - 50 nA
POWER SUPPLY CHARACTERISTICS
Power Dissipation, P
D
Full--450--540mW
HI-518
