REVISION 10 3/18/15 10 LOW VOLTAGE, 1:27 CLOCK DISTRIBUTION CHIP
MPC941 DATA SHEET
Figure 12. LVCMOS_CLK MPC941 AC Test Reference for V
CC
= 3.3 V and V
CC
= 2.5 V
Figure 13. PECL_CLK MPC941 AC Test Reference for V
CC
= 3.3 V and V
CC
= 2.5 V
Figure 14. LVPECL Propagation Delay (t
PD
)
Test Reference
Figure 15. LVCMOS Propagation Delay (t
PD
)
Test Reference
Figure 16. Output Duty Cycle (DC)
Figure 17. Output-to-Output Skew t
SK(O)
Figure 18. Output Transition Time Test Reference
Figure 19. Input Transition Time Test Reference
Pulse
Generator
Z = 50
R
T
= 50
Z
O
= 50
R
T
= 50
Z
O
= 50
DUT MPC941
V
TT
V
TT
Differential Pulse
Generator
Z = 50
R
T
= 50
Z
O
= 50
R
T
= 50
Z
O
= 50
DUT MPC941
V
TT
V
TT
V
CC
V
CC
÷2
GND
V
PP
V
CMR
PCLK_CLK
PCLK_CLK
Q
t
PD
LVCMOS_CLK
Q
V
CC
V
CC
 2
GND
t
PD
V
CC
V
CC
 2
GND
The time from the PLL controlled edge to the non controlled
edge, divided by the time between PLL controlled edges,
expressed as a percentage
DC = t
P
/t
0
x 100%
V
CC
V
CC
2
GND
t
0
t
P
The pin-to-pin skew is defined as the worst case difference
in propagation delay between any two similar delay path
within a single device
t
SK(O)
V
CC
2
GND
V
OH
V
CC
2
GND
V
CC
t
F
t
R
V
CC
= 3.3 V V
CC
= 2.5 V
2.4
0.55
1.8 V
0.6 V
t
F
t
R
V
CC
= 3.3 V V
CC
= 2.5 V
2.0
0.8
1.7 V
0.7 V
REVISION 10 3/18/15 11 LOW VOLTAGE, 1:27 CLOCK DISTRIBUTION CHIP
MPC941 DATA SHEET
PACKAGE DIMENSIONS
CASE 932-03
ISSUE F
48-LEAD LQFP PACKAGE
REVISION 10 3/18/15 12 LOW VOLTAGE, 1:27 CLOCK DISTRIBUTION CHIP
MPC941 DATA SHEET
Revision History Sheet
Rev Table Page Description of Change Date
9 1 NRND – Not Recommend for New Designs 1/7/13
10 1 Removed NRND and updated the format of the data sheet 3/18/15

MPC941AER2

Mfr. #:
Manufacturer:
IDT
Description:
Clock Drivers & Distribution FSL 1-27 LVCMOS Fanout Buffer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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