4. Block Diagram
Figure 4-1 Block Diagram
CPU
ADC
ADC[7:0]
AREF
I/O
PORTS
D
A
T
A
B
U
S
SRAM
OCD
FLASH
NVM
programming
JTAG
TC 0
(8-bit async)
SPI
AC
AIN0
AIN1
ACO
ADCMUX
EEPROM
EEPROMIF
TC 3
(16-bit)
OC3A/B
T3
ICP3
TWI
SDA
SCL
USART 1
RxD1
TxD1
XCK1
Internal
Reference
Watchdog
Timer
Power
management
and clock
control
VCC
GND
Power
Supervision
POR/BOD &
RESET
TOSC2
XTAL2
RESET
XTAL1
TOSC1
TCK
TMS
TDI
TDO
INT[7:0]
OC0
MISO
MOSI
SCK
SS
PA[7:0]
PB[7:0]
PC[7:0]
PD[7:0]
PE[7:0]
PF[7:0]
PG[4:0]
USART 0
RxD0
TxD0
XCK0
TC 1
(16-bit)
OC1A/B/C
T1
ICP1
TC 2
(8-bit)
T2
OC2
AD[7:0]
A[15:8]
RD/WR/ALE
ExtMem
ExtInt
SERPROG
PARPROG
PEN
PDI
PDO
SCK
Clock generation
1MHz int
osc
32.768kHz
XOSC
External
clock
8MHz
Crystal Osc
12MHz
External
RC Osc
8MHz
Calib RC
Atmel ATmega64A [DATASHEET]
Atmel-8160ES-8-bit AVR Micrcontroller_Datasheet_Summary-09/2015
7
5. ATmega103 and ATmega64A Compatibility
The ATmega64A is a highly complex microcontroller where the number of I/O locations supersedes the
64 I/O locations reserved in the AVR instruction set. To ensure backward compatibility with the
ATmega103, all I/O locations present in ATmega103 have the same location in ATmega64A. Most
additional I/O locations are added in an Extended I/O space starting from 0x60 to 0xFF, (that is, in the
ATmega103 internal RAM space). These locations can be reached by using LD/LDS/LDD and
ST/STS/STD instructions only, not by using IN and OUT instructions. The relocation of the internal RAM
space may still be a problem for ATmega103 users. Also, the increased number of interrupt vectors might
be a problem if the code uses absolute addresses. To solve these problems, an ATmega103 compatibility
mode can be selected by programming the fuse M103C. In this mode, none of the functions in the
Extended I/O space are in use, so the internal RAM is located as in ATmega103. Also, the Extended
Interrupt vectors are removed.
The Atmel AVR ATmega64A is 100% pin compatible with ATmega103, and can replace the ATmega103
on current Printed Circuit Boards. The application note “Replacing ATmega103 by ATmega64A” describes
what the user should be aware of replacing the ATmega103 by an ATmega64A.
5.1. ATmega103 Compatibility Mode
By programming the M103C fuse, the ATmega64A will be compatible with the ATmega103 regards to
RAM, I/O pins and interrupt vectors as described above. However, some new features in ATmega64A are
not available in this compatibility mode, these features are listed below:
One USART instead of two, Asynchronous mode only. Only the eight least significant bits of the
Baud Rate Register is available.
One 16 bits Timer/Counter with two compare registers instead of two 16-bit Timer/Counters with
three compare registers.
Two-wire serial interface is not supported.
Port C is output only.
Port G serves alternate functions only (not a general I/O port).
Port F serves as digital input only in addition to analog input to the ADC.
Boot Loader capabilities is not supported.
It is not possible to adjust the frequency of the internal calibrated RC Oscillator.
The External Memory Interface can not release any Address pins for general I/O, neither configure
different wait-states to different External Memory Address sections.
In addition, there are some other minor differences to make it more compatible to ATmega103:
Only EXTRF and PORF exists in MCUCSR.
Timed sequence not required for Watchdog Time-out change.
External Interrupt pins 3 - 0 serve as level interrupt only.
USART has no FIFO buffer, so data overrun comes earlier.
Unused I/O bits in ATmega103 should be written to 0 to ensure same operation in ATmega64A.
Atmel ATmega64A [DATASHEET]
Atmel-8160ES-8-bit AVR Micrcontroller_Datasheet_Summary-09/2015
8
6. Pin Configurations
Figure 6-1 Pinout ATmega64A
1
2
3
4
44
43
42
41
40
39
38
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
37
36
35
34
12
13
14
15
16
17
18
19
20
21
22
45
46
47
48
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
RESET
VCC
GND
GND
VCC
AREF
AVCC
GND
PA3 (AD3)
PA4 (AD4)
PA5 (AD5)
PA6 (AD6)
PA7 (AD7)
PG2 (ALE)
PC7 (A15)
PC6 (A14)
PC5 (A13)
PC4 (A12)
PC3 (A11)
PC2 (A10)
PC1 (A9)
PC0 (A8)
PG1 (RD)
PG0 (WR)
PA0 (AD0)
PA1 (AD1)
PA2 (AD2)
PF7 (ADC7/TDI)
PF6 (ADC6/TDO)
PF5 (ADC5/TMS)
PF4 (ADC4/TCK)
PF3 (ADC3)
PF2 (ADC2)
PF1 (ADC1)
PF0 (ADC0)
XTAL2
XTAL1
(TOSC1) PG4
(TOSC2) PG3
(OC2/OC1C) PB7
(SCL/INT0) PD0
(SDA/INT1) PD1
(RXD1/INT2) PD2
(TXD1/INT3) PD3
(ICP1) PD4
(XCK1) PD5
(T1) PD6
(T2) PD7
PEN
(RXD0/PDI) PE0
(TXD0/PDO) PE1
(XCK0/AIN0) PE2
(OC3A/AIN1) PE3
(OC3B/INT4) PE4
(OC3C/INT5) PE5
(T3/INT6) PE6
(ICP3/INT7) PE7
(SS) PB0
(SCK) PB1
(MOSI) PB2
(MISO) PB3
(OC0) PB4
(OC1A) PB5
(OC1B) PB6
Power
Ground
Programming/debug
Digital
Analog
Crystal/Osc
External Memory
Note:  The Pinout figure applies to both TQFP and MLF packages. The bottom pad under the QFN/MLF
package should be soldered to ground.
6.1. Pin Descriptions
6.1.1. V
CC
Digital supply voltage.
Atmel ATmega64A [DATASHEET]
Atmel-8160ES-8-bit AVR Micrcontroller_Datasheet_Summary-09/2015
9

ATMEGA64A-AU

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
8-bit Microcontrollers - MCU 64K Flsh 2K EEPROM 4K SRAM 16MHz
Lifecycle:
New from this manufacturer.
Delivery:
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