MP1492 – 2A, 4.2V-16V INPUT, FAST TRANSIENT SYNCHRONOUS STEP-DOWN CONVERTER
MP1492 Rev. 1.1 www.MonolithicPower.com 11
3/13/2012 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
−
−
==
×
OUT
RAMP
SLOPE1
off 4 4
V
V
V
TRC
(7)
As can be seen from equation 7, if there is
instability in PWM mode, we can reduce either
R4 or C4. If C4 can not be reduced further due to
limitation from equation 4, then we can only
reduce R4. For a stable PWM operation, the
V
slope1
should be design follow equation 8.
SW ON
-3
ESR OUT
slope1 OUT
OUT SW on
TT
+-RC
Io 10
0.7 2
-V V +
2LC T -T
×
×
≥
××
(8)
Io is the load current.
In skip mode, the downward slope of the V
FB
ripple is almost the same whether the external
ramp is used or not. Figure 7 shows the
simplified circuit of the skip mode when both the
HS-FET and LS-FET are off.
Figure 7—Simplified Circuit in skip Mode
The downward slope of the V
FB
ripple in skip
mode can be determined as follow:
()
REF
SLOPE2
12 OUT
V
V
(R R //Ro) C
−
=
+×
(9)
Where Ro is the equivalent load resistor.
As described in Figure 4, V
SLOPE2
in the skip mode
is lower than that is in the PWM mode, so it is
reasonable that the jitter in the skip mode is
larger. If one wants a system with less jitter
during ultra light load condition, the values of the
V
FB
resistors should not be too big, however, that
will decrease the ultra light load efficiency.
Soft Start/Stop
MP1492 employs soft start/stop (SS) mechanism
to ensure smooth output during power up and
power shut-down. When the EN pin becomes
high, an internal SS voltage ramps up slowly.
The SS voltage takes over the REF voltage to
the PWM comparator. The output voltage
smoothly ramps up with the SS voltage. Once SS
voltage reaches the same level of the REF
voltage, it keeps ramping up, while REF takes
over the PWM comparator. At this point, the soft
start finishes, it enters steady state operation.
The SS time is about 1ms.
When the EN pin becomes low, the internal SS
voltage is discharged through an internal current
source. Once the SS voltage reaches REF
voltage, it takes over the PWM comparator. The
output voltage will decrease smoothly with SS
voltage until zero level.
Over-Current Protection (OCP) and Short-
Circuit Protection (SCP)
MP1492 has cycle-by-cycle over-current limiting
control. The inductor current is monitored during
the ON state. And it has two optional OCP/SCP
protection modes: latch-off mode and hiccup
mode.
For MP1492DS, once it detects that the inductor
current is higher than the current limit, the HS-
FET is turned off. At the same time, the OCP
timer is started. The OCP timer is set as 50s. If
in the following 50s, the current limit is hit for
every cycle, then it’ll trigger OCP. The converter
needs power cycle to restart after it triggers OCP.
When the current limit is hit and the FB voltage is
lower than 50% of the REF voltage, MP1492DS
considers this as a dead short on the output. It’ll
trigger OCP immediately. This is short-circuit
protection (SCP).
For MP1492DS-A, enters hiccup mode that
periodically restarts the part when the inductor
current peak value exceeds the current limit and
V
FB
drops below the under-ltage (UV) threshold.
Typically, the UV threshold is 50% below the
REF voltage, In OCP/SCP, MP1492DS-A will
disable the output voltage power, discharge
internal soft-start cap, and then automatically try
to soft –start again. If the over-current circuit
condition still holds after soft-start ends, it
repeats this operation cycle until the over-current
circuit condition disappears, and output rises
back to regulation level.
Over/Under-voltage Protection (OVP/UVP)
MP1492 monitors the output voltage through a
resistor divided feedback (FB) voltage to detect
