Technical Note
11/18
BU6520KV,BU6521KV
www.rohm.com
2010.02 - Rev.C
© 2010 ROHM Co., Ltd. All rights reserved.
4. SPI-bus Interface Timing
ｔ
SPDV
ｔ
SPS
ｔ
SPH
ｔ
SPCS
ｔ
SPCH
SCK
SCEB
SDO
SDI
Fig.8 SPI-bus Interface Timing
Symbol Description MIN TYP MAX Unit
t
SPCLK
Clock Cycle 2 736*1 8192 t
CAMCKI
d
SPCLK
Clock Duty 45 50 55 %
t
SPCS
SCK Rise SCEB Setup Time 4
738～
1105
*1
12289 t
CAMCKI
t
SPCH
SCEB Rise after SCK Rise Time 2 751
*1
8319 t
CAMCKI
t
SPDV
Decision of SDO from SCK Fall - - 28 ns
t
SPS
SCK Rise SDI Setup Time - - 28 ns
t
SPH
SCK Rise SDI Hold Time - - 28 ns
*1 Default status right after reset
When the automatic reading function with the AUTO pin is used, it becomes timing of SCEB to SCK as above.
It is possible to access from the register of BU6520KV/BU6521KV to EEPROM.In that case, SCEB is controlled by the
register.
After the value is set to the register, the SCEB pin is changed into the logic set at once.
