MAX9720
Charge-Pump Capacitor Selection
Use capacitors with an ESR less than 100mΩ for opti-
mum performance. Low-ESR ceramic capacitors mini-
mize the output resistance of the charge pump. For
best performance over the extended temperature
range, select capacitors with an X7R dielectric. Table 2
lists suggested manufacturers.
Flying Capacitor (C1)
The value of the flying capacitor (C1) affects the charge
pump’s load regulation and output impedance. A C1
value that is too small degrades the device’s ability to
provide sufficient current drive, which leads to a loss of
output voltage. In most applications, 1µF for both C1
and C2 provides adequate performance. Increasing
the value of C1 improves load regulation and reduces
the charge-pump output resistance to an extent. See
the Output Power vs. Charge Pump Capacitance and
Load Resistance graph in the Typical Operating
Characteristics. Above 2.2µF, the on-resistance of the
switches and the ESR of C1 and C2 dominate.
Hold Capacitor (C2)
The hold capacitor value and ESR directly affect the
ripple on PV
SS
. Increasing the value of C2 reduces out-
put ripple. Likewise, decreasing the ESR of C2 reduces
both ripple and output impedance. Lower capacitance
values can be used in systems with low maximum out-
put power levels. See the Output Power vs. Charge-
Pump Capacitance and Load Resistance graph in the
Typical Operating Characteristics.
Power-Supply Bypass Capacitor
The power-supply bypass capacitor (C3) lowers the
output impedance of the power supply and reduces the
impact of the MAX9720’s charge-pump switching tran-
sients. Bypass V
DD
with C3, the same value as C1, and
place it physically close to the device.
TIME Capacitor
The TIME capacitor (C
TIME
) sets the HPS debounce
time. The debounce time is the delay between HPS
exceeding 0.8 x V
DD
and the execution of the
SmartSense routine. The delay ensures that any exces-
sive contact bounce caused by the insertion of a head-
phone plug into the jack does not cause HPS to
register an invalid state (Figure 9). The value of the
C
TIME
in nF equals the nominal delay time in ms, i.e.,
C
TIME
= 10nF = t
DELAY
= 10ms. C
TIME
values in the
200nF to 600nF range are recommended.
Adding Volume Control
The addition of a digital potentiometer provides simple,
digital volume control. Figure 10 shows the MAX9720
with the MAX5408 dual log taper digital potentiometer
used as an input attenuator. Connect the high terminal
of the MAX5408 to the audio input, the low terminal to
GND, and the wiper to C
IN
. Setting the wiper to the top
position passes the audio signal unattenuated. Setting
the wiper to the lowest position fully attenuates the input.
Layout and Grounding
Proper layout and grounding are essential for optimum
performance. Connect PGND and SGND together at a
single point on the PC board. Connect all components
associated with the charge pump (C2 and C3) to the
PGND plane. Connect PV
SS
and SV
SS
together at the
device. Bypassing of both the positive and negative
supplies is accomplished by the charge-pump capaci-
tors, C2 and C3 (see Typical Application Circuit). Place
capacitors C1 and C3 as close to the device as possi-
ble. Place capacitor C2 as close to PV
SS
as possible.
Route PGND and all traces that carry switching tran-
sients away from SGND, traces, and components in the
audio signal path.
50mW, DirectDrive, Stereo Headphone
Amplifier with SmartSense and Shutdown
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