Data Sheet ADM8611/ADM8612/ADM8613/ADM8614/ADM8615
Rev. D | Page 13 of 17
MANUAL RESET INPUT
The ADM8611, ADM8612, ADM8613, and ADM8615 feature a
manual reset input (
MR
). Drive
MR
low to assert the reset output.
When
MR
transitions from low to high, the reset remains asserted
for the duration of the reset timeout period before deasserting.
The
MR
input has a 600 kΩ internal pull-up resistor so that the
input is always high when unconnected. To drive the
MR
input,
use an external signal or a push-button switch to ground; debounce
circuitry is integrated on-chip for this purpose. Noise immunity is
provided on the
MR
input, and fast, negative going transients of
up to 0.4 µs (typical) are ignored. If required, a 0.1 F capacitor
between the
MR
pin and ground provides additional noise
immunity.
Figure 28. Manual Reset Timing
WATCHDOG TIMER
The ADM8613/ADM8614/ADM8615 feature a watchdog timer
that monitors microprocessor activity. A timer circuit is cleared
with every low to high or high to low logic transition on the watch-
dog input pin (WDI), which detects pulses as short as 85 ns. If
the timer counts through the preset watchdog timeout period (t
WD
),
a
RESET
output is asserted. The microprocessor must toggle the
WDI pin to avoid being reset. Failure of the microprocessor to
toggle the WDI pin within the timeout period indicates a code
execution error, and the reset pulse generated restarts the
microprocessor in a known state.
In addition to logic transitions on WDI, the watchdog timer
is also cleared by a reset assertion caused by an undervoltage
condition on the VCC pin, WDT_SEL toggling, or
MR
being
pulled low. When
RESET
is asserted, the watchdog timer is
cleared and does not begin counting again until the
RESET
output is deasserted. The watchdog timer can be disabled by
driving the watchdog disable input (WD_DIS) high.
Figure 29. Watchdog Timer Timing
WATCHDOG TIMEOUT SELECT INPUT
Pulling the watchdog timeout select input (WDT_SEL) on the
ADM8614 high allows the device to extend its watchdog timeout
period from 1.6 sec (typical) to 100 sec (typical). This function
allows processors to have a long initialization time during startup.
The long timeout period also enables the processor to stay in
low power mode for a long period and work only intermittently,
reducing overall system power consumption.
TYPICAL APPLICATION CIRCUITS
Figure 30. ADM8611 Typical Application Circuit
Figure 31. ADM8612 Typical Application Circuit
Figure 32. ADM8613 Typical Application Circuit
Figure 33. ADM8614 Typical Application Circuit
VCC
RESET
MR
V
TH
t
RP
t
RP
MR EXTERNALLY
DRIVEN LOW
t
D_MR
12782-027
0V
0V
V
TH
V
CC
WDI
RESET
t
RP
t
RP
t
WD
12782-028
ADM8611
MICROPROCESSOR
VCC
GND
RESET RESET
MR
3.3
V
V
CORE
12782-029
12782-030
ADM8612
MICROPROCESSOR
VCC
GND
RESET INPUT
MR
3.3V
V
IO
V
CORE
VIN
0.8
V
ADM8613
MICROPROCESSOR
VCC
V
IO
WD_DIS
WDI
GND
RESET
MR
RESET
2.5
V
OUTPUT
12782-031
ADM8614
VCC
V
IO
WD_DIS
WDT_SEL
WDI
GND
RESET
RESET
2
.5
V
OUTPUT
OUTPUT
OUTPUT
12782-032
MICROPROCESSOR
ADM8611/ADM8612/ADM8613/ADM8614/ADM8615 Data Sheet
Rev. D | Page 14 of 17
LOW POWER DESIGN TECHINQUES
With their ultralow power consumption level, the ADM8611/
ADM8612/ADM8613/ADM8614/ADM8615 are ideal for battery-
powered, low power applications where every bit of power matters.
In addition to using low power ICs, good circuit design practices
can help the user further reduce the overall system power loss.
Digital Inputs
The digital inputs of the ADM8611/ADM8612/ADM8613/
ADM8614/ADM8615 voltage supervisors are designed with
CMOS technology to minimize power consumption. The nature of
the CMOS structure leads to an increase of the device I
CC
, while
the voltage level on the input approaches its undefined logic range,
as shown in Figure 11. To minimize this effect, follow these
recommendations:
If the digital input does not need to be toggled in a particular
design, tie it directly to the VCC or GND pin of the device.
Push-pull outputs with logic high levels close to the V
CC
of the
ADM8611/ADM8612/ADM8613/ADM8614/ADM8615 are
the ideal choice for driving the digital signal line.
Using push-pull outputs with a logic high level near the
minimum logic high specification of the digital input is
usually not recommended. One exception is if the input is
required to be driven high only infrequently for a relatively
short period.
Open-drain outputs with a pull-up resistor to VCC can be
used to drive digital signal lines. Open-drain outputs are
best suited for driving lines that are required to be driven
low only infrequently for a relatively short period.
The leakage current on both the digital input and the open-
drain output determines the size of the pull-up resistor
needed and, in turn, decides the power loss through the
resistor while driving the input low.
The
MR
pin on the ADM8611, ADM8612, ADM8613, and
ADM8615 features an internal pull-up resistor. The infrequent
usage of this pin makes its power loss while driven to logic
low negligible.
WDI Input
When the watchdog input (WDI) is driven by a push-pull
input/output with a logic high level near the V
CC
level of the
ADM8613/ADM8614/ADM8615, neither a high nor a low input
logic causes the system to consume additional current. To reduce
the total current consumption, increase the speed of the input
transition to the number of transitions. One high to low or low
to high transition within the watchdog timeout period is sufficient
to prevent the watchdog timer from generating a reset output.
If the watchdog input is driven by a push-pull output with a logic
high level near the minimum logic high specification of the digital
input, then a logic high input may cause CMOS shoot through
and increase the bias current (I
CC
) of the ADM8613/ADM8614/
ADM8615. To minimize the power loss in this setup, use short
positive pulses to drive the WDI pin. The ideal pulse width is as
small as possible but greater than the required minimum pulse
width of the WDI input. One pulse within the watchdog timeout
period is sufficient to prevent the watchdog timer from generating
a reset output.
Figure 34. Using a Push-Pull Output with a Lower Logic High Level to VCC,
Driving the WDI Pin with Short Positive Pulse to Reduce I
CC
Similarly, if an open-drain input/output with a pull-up resistor
to VCC is used to drive WDI, a logic low input causes additional
current flowing through the pull-up resistor. A short negative
pulse technique can minimize the long-term current consumption.
Figure 35. Short Negative Pulse on the WDI Pin to Reduce Leakage Current
Through the Pull-Up Resistor
WD_DIS Input
For the ADM8613 and ADM8614, the watchdog disable input
(WD_DIS) disables the watchdog function during system
prototyping or during power-up to allow extra time for
processor initialization.
To disable the watchdog timer function during power-up after a
reset deassertion, the processor configures its input/output and
drives WD_DIS high within the watchdog timeout period. If
there is not enough time to configure the input/output or if an
open-drain input/output is used to drive WD_DIS, an external
pull-up resistor is required to keep the watchdog function disabled
during power-up. Extra current is consumed through the pull-up
resistor to enable the watchdog function. The leakage current
on both WD_DIS and the input/output that drives it determines
the size of the pull-up resistor needed and, in turn, determines
the power loss through the resistor while driving the input low.
ADM8614
MICROPROCESSOR
VCC
V
IO
WDI
WATCHDOG
OUTPUT
2.5V
1.5V
HIGH
LOW
PUSH-PULL
OUTPUT
12782-033
ADM8614
MICROPROCESSOR
VCC
WDI
2.5V
HIGH
LOW
OPEN-DRAIN
OUTPUT
WATCHDOG
OUTPUT
12782-036
Data Sheet ADM8611/ADM8612/ADM8613/ADM8614/ADM8615
Rev. D | Page 15 of 17
DEVICE OPTIONS
Table 9. Selection Table
Device
Number
Low Voltage
Monitoring
Manual
Reset
Watchdog
Timer
Watchdog Disable
Input
Watchdog Timeout
Selection Input
ADM8611 No Yes No No No
ADM8612 Yes Yes No No No
ADM8613 No Yes Yes Yes No
ADM8614 No No Yes Yes Yes
ADM8615 Yes Yes Yes No No
Table 10. ADM8611 V
CC
Reset Threshold Voltage (V
TH
) Options (T
A
= −40°C to +85°C)
Reset Threshold Number Min Typ Max Unit
200 1.974 2 2.026 V
220 2.171 2.2 2.229 V
232 2.290 2.32 2.350 V
263 2.596 2.63 2.664 V
280
2.764
2.8
2.836
V
293
2.892
2.93
2.968
V
300 2.961 3 3.039 V
308 3.040 3.08 3.120 V
440 4.343 4.4 4.457 V
463 4.570 4.63 4.690 V
Table 11. ADM8612 and ADM8615 V
IN
Reset Threshold Voltage (V
TH
) Options (T
A
= −40°C to +85°C)
Reset Threshold Number Min Typ Max Unit
050 0.489 0.5 0.511 V
055 0.538 0.55 0.562 V
060 0.588 0.6 0.612 V
065 0.637 0.65 0.663 V
070 0.686 0.7 0.714 V
075 0.736 0.75 0.764 V
080 0.785 0.8 0.815 V
085 0.835 0.85 0.865 V
090 0.885 0.9 0.915 V
095 0.935 0.95 0.965 V
100 0.984 1 1.016 V
110 1.084 1.1 1.116 V
120 1.184 1.2 1.216 V
130 1.283 1.3 1.317 V
140 1.382 1.4 1.418 V
150 1.481 1.5 1.520 V
160
1.579
1.6
1.621
V
170 1.678 1.7 1.722 V
180 1.777 1.8 1.823 V
190 1.875 1.9 1.925 V

ADM8614Y263ACBZ-R7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits IC,Watchdog,WD_DIS,WDT_SEL ULP Supv Ckt
Lifecycle:
New from this manufacturer.
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