REVISION B 7/14/15
8731-01 DATA SHEET
5 LOW SKEW, 1-TO-11 DIFFERENTIAL-TO-3.3V LVPECL
CLOCK MULTIPLIER / ZERO DELAY BUFFER
TABLE 4D. LVPECL DC CHARACTERISTICS, V
CC
= V
CCA
= V
CCO
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage; NOTE 1 V
CCO
- 1.4 V
CCO
- 0.9 V
V
OL
Output Low Voltage; NOTE 1 V
CCO
- 2.0 V
CCO
- 1.7 V
V
SWING
Peak-to-Peak Output Voltage Swing 0.6 1.0 V
NOTE 1: Outputs terminated with 50Ω to V
CCO
- 2V.
TABLE 4C. DIFFERENTIAL DC CHARACTERISTICS, V
CC
= V
CCA
= V
CCO
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
I
IH
Input High Current
REF_CLK, FB_IN V
CC
= V
IN
= 3.465V 150 µA
nREF_CLK, nFB_IN V
CC
= V
IN
= 3.465V 5 µA
I
IL
Input Low Current
REF_CLK, FB_IN V
CC
= 3.465V, V
IN
= 0V -5 µA
nREF_CLK, nFB_IN V
CC
= 3.465V, V
IN
= 0V -150 µA
V
PP
Peak-to-Peak Input Voltage 0.15 1.3 V
V
CMR
Common Mode Input Voltage; NOTE 1, 2 V
EE
+ 0.5 V
CC
- 0.85 V
NOTE 1: For single ended applications, the maximum input voltage for REF_CLK, nREF_CLK and FB_IN, nFB_IN
is V
CC
+ 0.3V.
NOTE 2: Common mode voltage is defi ned as
V
IH
.
TABLE 6. AC CHARACTERISTICS, V
CC
= V
CCA
= V
CCO
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 700 MHz
t
PD
Propagation Delay; NOTE 1
PLL_SEL = 0V, ƒ ≤ 450MHz
4.0 5.5 ns
t(Ø) Static Phase Offset; NOTE 2
PLL_SEL = 3.3V,
DIV_SEL[2:0] = 000,
FB_SEL[1:0] = 00
50 150 ps
tsk(o) Output Skew; NOTE 3, 4 70 ps
tjit(cc) Cycle-to-Cycle Jitter; NOTE 4 65 ps
t
L
PLL Lock Time 1ms
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 300 700 ps
odc Output Duty Cycle
ƒ ≤ 300MHz
45 55 %
All parameters measured at f
MAX
unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defi ned as the time difference between the input reference clock and the average feedback input signal
when the PLL is locked and the input reference frequency is stable.
NOTE 3: Defi ned as skew between outputs at the same supply voltages and with equal load conditions.
Measured at the output differential cross points.
NOTE 4: This parameter is defi ned in accordance with JEDEC Standard 65.
TABLE 5. PLL INPUT REFERENCE CHARACTERISTICS, V
CC
= V
CCA
= V
CCO
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
REF
Input Reference Frequency 200 MHz
