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X40010S8-A

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
4
FN8111.0
March 28, 2005
Figure 2. V
TRIPX
Set/Reset Conditions
WATCHDOG TIMER
The Watchdog Timer circuit monitors the microprocessor
activity by monitoring the SDA and SCL pins. The micro-
processor must toggle the SDA pin HIGH to LOW period-
ically, while SCL also toggles from HIGH to LOW (this is
a start bit) followed by a stop condition prior to the expira-
tion of the watchdog time out period to prevent a WDO
signal going active. The state of two nonvolatile control
bits in the Status Register determines the watchdog timer
period. The microprocessor can change these watchdog
bits by writing to the X40010/11/14/15 control register
(also refer to page 19).
Figure 3. Watchdog Restart
V1 AND V2 THRESHOLD PROGRAM PROCEDURE
(OPTIONAL)
The X40010/11/14/15is shipped with standard V1 and
V2 threshold (V
TRIP1,
V
TRIP2
) voltages. These values
will not change over normal operating and storage
conditions. However, in applications where the stan-
dard thresholds are not exactly right, or if higher preci-
sion is needed in the threshold value, the
X40010/11/14/15trip points may be adjusted. The pro-
cedure is described below, and uses the application of
a high voltage control signal.
Setting a V
TRIPx
Voltage (x = 1, 2)
There are two procedures used to set the threshold
voltages (V
TRIPx
), depending if the threshold voltage to
be stored is higher or lower than the present value. For
example, if the present V
TRIPx
is 2.9 V and the new
V
TRIPx
is 3.2 V, the new voltage can be stored directly
into the V
TRIPx
cell. If however, the new setting is to be
lower than the present setting, then it is necessary to
“reset” the V
TRIPx
voltage before setting the new value.
Setting a Higher V
TRIPx
Voltage (x = 1, 2)
To set a V
TRIPx
threshold to a new voltage which is
higher than the present threshold, the user must apply
the desired V
TRIPx
threshold voltage to the corre-
sponding input pin Vcc(V1MON), or V2MON. The
Vcc(V1MON) and V2MON must be tied together dur-
ing this sequence. Then, a programming voltage (Vp)
must be applied to the WDO
pin before a START con-
dition is set up on SDA. Next, issue on the SDA pin the
Slave Address A0h, followed by the Byte Address 01h
for V
TRIP1
and 09h for V
TRIP2
, and a 00h Data Byte in
order to program V
TRIPx
. The STOP bit following a
valid write operation initiates the programming
sequence. Pin WDO
must then be brought LOW to
complete the operation.
Note: This operation does not corrupt the memory
array.
Setting a Lower V
TRIPx
Voltage (x = 1, 2)
In order to set V
TRIPx
to a lower voltage than the
present value, then V
TRIPx
must first be “reset” accord-
ing to the procedure described below. Once V
TRIPx
has been “reset”, then V
TRIPx
can be set to the desired
voltage using the procedure described in “Setting a
Higher V
TRIPx
Voltage”.
V
CC
/V2MON
V
TRIPX
V
P
t
WC
A0h
0
7
70 70
SCL
WDO
SDA
(X = 1, 2)
00h
SCL
SDA
.6µs
1.3µs
Timer Start
X40010, X40011, X40014, X40015
5
FN8111.0
March 28, 2005
Resetting the V
TRIPx
Voltage
To reset a V
TRIPx
voltage, apply the programming volt-
age (Vp) to the WDO
pin before a START condition is
set up on SDA. Next, issue on the SDA pin the Slave
Address A0h followed by the Byte Address 03h for
V
TRIP1
and 0Bh for V
TRIP2
, followed by 00h for the
Data Byte in order to reset V
TRIPx
. The STOP bit fol-
lowing a valid write operation initiates the program-
ming sequence. Pin WDO
must then be brought LOW
to complete the operation.
After being reset, the value of V
TRIPx
becomes a nomi-
nal value of 1.7V or lesser.
Note: This operation does not corrupt the memory
array.
CONTROL REGISTER
The Control Register provides the user a mechanism
for changing the Block Lock and Watchdog Timer set-
tings. The Block Lock and Watchdog Timer bits are
nonvolatile and do not change when power is removed.
The Control Register is accessed with a special pream-
ble in the slave byte (1011) and is located at address
1FFh. It can only be modified by performing a byte write
operation directly to the address of the register and only
one data byte is allowed for each register write opera-
tion. Prior to writing to the Control Register, the WEL
and RWEL bits must be set using a two step process,
with the whole sequence requiring 3 steps. See "Writing
to the Control Registers" on page 7.
The user must issue a stop, after sending this byte to
the register, to initiate the nonvolatile cycle that stores
WD1, WD0, PUP1, PUP0, BP1, and BP0. The
X40010/11/14/15 will not acknowledge any data bytes
written after the first byte is entered.
The state of the Control Register can be read at any
time by performing a random read at address 01Fh,
using the special preamble. Only one byte is read by
each register read operation. The master should sup-
ply a stop condition to be consistent with the bus pro-
tocol, but a stop is not required to end this operation.
RWEL: Register Write Enable Latch (Volatile)
The RWEL bit must be set to “1” prior to a write to the
Control Register.
Figure 4. Sample V
TRIP
Reset Circuit
76543210
PUP1 WD1 WD0 BP 0 RWEL WEL PUP0
1
3
2
4
8
7
6
5
SOIC
V
TRIP1
Adj.
V
P
RESET
4.7K
SDA
SCL
µC
Adjust
Run
V2FAIL
V
TRIP2
Adj.
X4001x
X40010, X40011, X40014, X40015
6
FN8111.0
March 28, 2005
Figure 5. V
TRIPX
Set/Reset Sequence (X = 1, 2)
WEL: Write Enable Latch (Volatile)
The WEL bit controls the access to the memory and to
the Register during a write operation. This bit is a vola-
tile latch that powers up in the LOW (disabled) state.
While the WEL bit is LOW, writes to any address,
including any control registers will be ignored (no
acknowledge will be issued after the Data Byte). The
WEL bit is set by writing a “1” to the WEL bit and zeros
to the other bits of the control register.
Once set, WEL remains set until either it is reset to 0
(by writing a “0” to the WEL bit and zeros to the other
bits of the control register) or until the part powers up
again. Writes to the WEL bit do not cause a high volt-
age write cycle, so the device is ready for the next
operation immediately after the stop condition.
V
TRIPX
Programming
Apply V
CC
and Voltage
Decrease
V
X
Actual
V
TRIPX -
Desired
V
TRIPX
DONE
Set Higher V
X
Sequence
Error < MDE
–
| Error | < | MDE |
YES
NO
Error > MDE
+
> Desired V
TRIPX
to
V
X
Desired
Present Value
V
TRIPX
Execute
No
YES
Execute
V
TRIPX
Reset Sequence
Execute
Set Higher V
TRIPX
Sequence
New V
X
applied =
Old V
X
applied + | Error |
New V
X
applied =
Old V
X
applied - | Error |
Execute Reset V
TRIPX
Sequence
Output Switches?
Note: X = 1, 2
Let: MDE = Maximum Desired Error
Vx = V
CC
, VxMON
MDE
+
Desired Value
MDE
–
Acceptable
Error Range
Error = Actual - Desired
X40010, X40011, X40014, X40015
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

X40010S8-A

Mfr. #:
Buy X40010S8-A
Manufacturer:
Renesas / Intersil
Description:
IC VOLTAGE MONITOR DUAL 8-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
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