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SIT9120AC-1C3-25S166.600000X

P1-P3P4-P6P7-P9P10-P12P13-P13
The Smart Timing Choice
The Smart Timing Choice
SiT9120
Standard Frequency Differential Oscillator
Rev. 1.06 Page 4 of 8 www.sitime.com
Termination Diagrams
LVPECL:
Z0 = 50
Z0 = 50
D+
D-
OUT+
OUT-
50
VTT = VDD – 2.0 V
LVPECL Driver
Receiver Device
50
VDD
D+
D-
OUT+
OUT-
LVPECL Driver
Receiver Device
Z0 = 50
Z0 = 50
R1
50 50
R1
VTT
100 nF
100 nF
VDD
VDD= 3.3V => R1 = 100 to 150
VDD= 2.5V => R1 = 75
Figure 4. LVPECL AC Coupled Termination
Z0 = 50
Z0 = 50
D+
D-
OUT+
OUT-
LVPECL Driver
Receiver Device
R1
R2
R3
R4
VDD
VDD = 3.3V => R1 = R3 = 133 and
R2 = R4 = 82
VDD = 2.5V => R1 = R3 = 250 and
R2 = R4 = 62.5
VDD
Figure 5. LVPECL with Thevenin Typical Termination
The Smart Timing Choice
The Smart Timing Choice
SiT9120
Standard Frequency Differential Oscillator
Rev. 1.06 Page 5 of 8 www.sitime.com
LVDS:
Figure 6. LVDS Single Termination (Load Terminated)
Z0 = 50
Z0 = 50
D+
D-
OUT+
OUT-
100
LVDS Driver
Receiver Device
VDD
The Smart Timing Choice
The Smart Timing Choice
SiT9120
Standard Frequency Differential Oscillator
Rev. 1.06 Page 6 of 8 www.sitime.com
Notes:
1. Top Marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the device.
2. A capacitor of value 0.1 F between Vdd and GND is recommended.
Dimensions and Patterns
Package Size – Dimensions (Unit: mm)
[1]
Recommended Land Pattern (Unit: mm)
[2]
3.2 x 2.5x 0.75 mm
5.0 x 3.2 x 0.75 mm
7.0 x 5.0x 0.90 mm
0.75±0.05
YXXXX
0.9
#2
#5
#2
#5
#1#3
#4
#6
#1 #3
#4#6
3.2±0.05
2.5±0.05
0.7
0.6
2.20
1.050.65
1.00
2.25
1.6
0.75±0.05
YXXXX
1.20
#2
#5
#2
#5
#1#3
#4 #6
#1 #3
#4#6
5.0±0.10
1.40
1.10
5.08
7.0±0.10
2.60
#1 #3
#6 #4
#1#3
#6
#4
0.90 ±0.10
#2
#5
#2
#5
YXXXX
5.08
1.60
1.60
3.80
P1-P3P4-P6P7-P9P10-P12P13-P13

SIT9120AC-1C3-25S166.600000X

Mfr. #:
Buy SIT9120AC-1C3-25S166.600000X
Manufacturer:
Description:
MEMS OSC XO 166.6000MHZ LVPECL
Lifecycle:
New from this manufacturer.
Delivery:
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