MAX1470
Detailed Description
The MAX1470 CMOS superheterodyne receiver and a
few external components provide the complete receive
chain from the antenna to the digital output data.
Depending on signal power and component selection,
data rates as high as 100kbps can be achieved.
The MAX1470 is designed to receive binary ASK data
on a 315MHz carrier. ASK modulation uses a difference
in amplitude of the carrier to represent logic 0 and logic
1 data.
Low-Noise Amplifier
The LNA is a cascode amplifier with off-chip inductive
degeneration that achieves approximately 16dB of
power gain with a 2.0dB noise figure and an IIP3 of
-18dBm. The gain and noise figure is dependent on
both the antenna matching network at the LNA input,
and the LC tank network between the LNA output and
the mixer inputs.
The off-chip inductive degeneration is achieved by con-
necting an inductor from LNASRC to AGND. This inductor
sets the real part of the input impedance at LNAIN, allow-
ing for a more flexible match for low-input impedance
such as a PC board trace antenna. A nominal value for
this inductor with a 50Ω input impedance is 15nH, but is
affected by PC board trace. See Typical Operating
Characteristics for the relationship between the induc-
tance and input impedance.
The LC tank filter connected to LNAOUT comprises L1
and C9 (see Typical Applications Circuit). L1 and C9 val-
ues are selected to resonate at the RF input frequency of
315MHz. The resonant frequency is given by:
315MHz Low-Power, +3V Superheterodyne
Receiver
6 _______________________________________________________________________________________
Pin Description
PIN NAME FUNCTION
1 XTAL1 1st Crystal Input
2, 7 AV
DD
Positive Analog Supply Voltage for RF Sections. Decouple to AGND with 0.01µF capacitors.
3 LNAIN Low-Noise Amplifier Input
4 LNASRC
Low-Noise Amplifier Source. Connect inductor to ground to set LNA input impedance (see Low-
Noise Amplifier section).
5, 10 AGND Analog Ground
6 LNAOUT Low-Noise Amplifier Output
8 MIXIN1 1st Differential Mixer Input. Must be AC-coupled to driving input.
9 MIXIN2 2nd Differential Mixer Input. Must be AC-coupled to driving input.
11, 15, 16,
23, 24
I.C. Internally Connected. Do not make connection to these pins.
12 MIXOUT 330Ω Mixer Output
13 DGND Digital Ground
14 DV
DD
Positive Digital Supply Voltage. Decouple to DGND with a 0.01µF capacitor.
17 IFIN1 1st Differential Intermediate Frequency Limiter Amplifier Input
18 IFIN2 2nd Differential Intermediate Frequency Limiter Amplifier Input
19 DSP Positive Data Slicer Input
20 DSN Negative Data Slicer Input
21 OPP Noninverting Op Amp. Input for the Sallen-Key data filter.
22 DF Data Filter Feedback Node. Input for the feedback of the Sallen-Key data filter.
25 DATAOUT Digital Baseband Data Output
26 PDOUT Peak Detector Output
27 PWRDN Power-Down Select Input. Drive this pin with a logic low to shut down the IC.
28 XTAL2 2nd Crystal Input
