LT5570
13
5570f
The high performance RF circuits inside the LT5570 enable
it to handle output ripple as high as 2dB without losing its
power detection accuracy. The ripple can be further reduced
for optimal transient time with an additional RC lowpass
lter at the output as discussed in the next section.
Output Interface
The output buffer amplifi er of the LT5570 is shown in
Figure 9. This push-pull buffer amplifi er can source 5mA
current to the load and sink 2.5mA current from the load.
The output impedance is determined primarily by the 100Ω
series resistor connected to the buffer amplifi er. This will
prevent any over-stress on the internal devices in case the
output is shorted to ground.
The –3dB bandwidth of the buffer amplifi er is about
2.4MHz and the full-scale rise/fall time can be as fast as
175ns. When the output is resistively terminated or open,
the fastest output transient response is achieved when a
large signal is applied to the RF input port. The total rise
time of the LT5570 is about 0.5μs and the total fall time
is 8μs, respectively, for full-scale pulsed RF input power.
The speed of the output transient response is dictated
mainly by the fi ltering capacitor C1 (at least 22nF) at the
FLTR pin. See the detailed output transient response in
the Typical Performance Characteristics section. When the
RF input has AM content, residual ripple may be present
at the output depending upon the low frequency content
of the modulated RF signal. For example, when 4-carrier
WCDMA is applied at the RF input, ±36mV
RMS
(about
±1dB) ripple is present at the output. This ripple can be
reduced with a larger fi ltering capacitor C1 at the expense
of a slower transient response.
APPLICATIONS INFORMATION
Figure 9. Simplifi ed Circuit Schematic of the Output Interface
1007 R
SS
OUT
INPUT
V
CC
50μA
V
OUT
C
LOAD
3566 F09
LT5570
Figure 8. Output DC Voltage Variation and
Residual Ripple vs AM Modulation Frequency
AM MODULATION FREQUENCY (MHz)
C1 = 22nF
0.01
OUTPUT AC RIPPLE (dB)
DEVIATION OF DC OUTPUT VOLTAGE (dB)
4
5
6
10
5570 F08
3
2
0
0.1
1
1
8
7
–1
–2
–3
1
0
OUTPUT AC RIPPLE
DC VOLTAGE VARIATION
LT5570
14
5570f
Figure 10. Residual ripple, Output Transient
Times with Output Low-pass Filter
Figure 11. Enable Pin Simplifi ed Circuit
Since the output amplifi er of the LT5570 is capable of driv-
ing an arbitrary capacitive load, the residual ripple can be
ltered at the output with a series resistor R
SS
and a large
shunt capacitor C
LOAD
. See Figure 9. This lowpass fi lter
also reduces the output noise by limiting the output noise
bandwidth. When this RC network is designed properly,
a fast output transient response can be maintained with
reduced residual ripple. We can estimate C
LOAD
with an
output voltage swing of 1.8V at 2140MHz. In order that
the maximum 2.5mA sinking current not limit the fall time
(about 8μS), C
LOAD
can be chosen as follows.
C
LOAD
= 2.5mA • approximate additional time/1.8V
= 2.5mA • 0.25μs/1.8V = 347pF
Once C
LOAD
is determined, R
SS
can be chosen properly
to form a RC lowpass fi lter with a corner frequency of
2π/(R
SS
• C
LOAD
). Using 4-carrier W-CDMA as an example,
Figure 10 shows the residual ripple is reduced to half from
36mV
RMS
with R
SS
= 4.7k and C
LOAD
= 330pF, while the
fall time is slightly increased to 8.8μS.
EN
V
CC
5570 F11
100k 100k
APPLICATIONS INFORMATION
In general, the rise time of the LT5570 is much shorter
than the fall time. However, when the output RC fi lter is
used, the rise time is dominated by the time constant of
this fi lter. Accordingly, the rise time becomes very similar
to the fall time.
Enable Interface
A simplifi ed schematic of the EN Pin interface is shown
in Figure 11. The enable voltage necessary to turn on the
LT5570 is 2V. To disable or turn off the chip, this voltage
should be below 1V. It is important that the voltage applied
to the EN pin should never exceed V
CC
by more than 0.3V.
Otherwise, the supply current may be sourced through
the upper ESD protection diode connected at the EN pin.
Under no circumstances should voltage be applied to the
EN Pin before the supply voltage is applied to the V
CC
pin.
If this occurs, damage to the IC may result.
TIMES (μs)
0
V
OUT
(V)
RESIDUAL RIPPLE (mV)
1.2
1.6
2.0
80
5570 F10
0.8
0.4
1.0
1.4
1.8
0.6
0.2
0
40
120
200
–40
–120
0
80
160
–80
–160
–200
2010
4030
60 70 90
50
100
AT 2140MHZ, P
IN
= 10dBm
RF
PULSE
OFF
RF
PULSE
OFF
RF PULSE ON
WITH FILTERING
WITHOUT
FILTERING
LT5570
15
5570f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
3.00 p0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.38 p 0.10
BOTTOM VIEW—EXPOSED PAD
1.65 p 0.10
(2 SIDES)
0.75 p0.05
R = 0.115
TYP
2.38 p0.10
(2 SIDES)
15
106
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DD) DFN 1103
0.25 p 0.05
2.38 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 p0.05
(2 SIDES)2.15 p0.05
0.50
BSC
0.675 p0.05
3.50 p0.05
PACKAGE
OUTLINE
0.25 p 0.05
0.50 BSC
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)

LT5570IDD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
RF Detector Fast Responding, 40MHz to 2.7GHz Mean-Squared Power Detector
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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