LTC2979
7
2979f
For more information www.linear.com/LTC2979
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
J
= 25°C. V
DD33
= 3.3V, V
IN_SNS
= 12V, V
DD25
and REF pins floating, unless
otherwise indicated. (Notes 2, 3)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating for extended periods may affect device reliability and
lifetime.
Note 2: All currents into device pins are positive. All currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
Note 3: The LTC2979 electrical characteristics apply to each half of the
device, unless otherwise noted. The specifications and functions are the
same for both Device A pins and Device B pins.
Note 4: The ADC total unadjusted error includes all error sources. First,
a two-point analog trim is performed to achieve a flat reference voltage
(V
REF
) over temperature. This results in minimal temperature coefficient,
but the absolute voltage can still vary. To compensate for this, a high-
resolution, drift-free, and noiseless digital trim is applied at the output of
the ADC, resulting in a very high accuracy measurement.
Note 5: Hysteresis in the output voltage is created by package stress that
differs depending on whether the module was previously at a higher or
lower temperature. Output voltage is always measured at 25°C, but the
module is cycled to 105°C or –40°C before successive measurements.
Hysteresis is roughly proportional to the square of the temperature
change.
Note 6: The current sense resolution is determined by the L11 format and
the mV units of the returned value. For example a full scale value of 170mV
returns a L11 value of 0xF2A8 = 680 • 2
–2
= 170. This is the lowest range
that can represent this value without overflowing the L11 mantissa and the
resolution for 1LSB in this range is 2
–2
mV = 250µV. Each successively
lower range improves resolution by cutting the LSB size in half.
Note 7: The time between successive ADC conversions (latency of the
ADC) for any given channel is given as: 36.9ms + (6.15ms • number of
ADC channels configured in Low Resolution mode) + (24.6ms • number of
ADC channels configured in High Resolution mode).
Note 8: Nonlinearity is defined from the first code that is greater than or
equal to the maximum offset specification to full-scale code, 1023.
Note 9: Output enable pins are charge pumped from V
DD33
.
Note 10: EEPROM endurance and retention are guaranteed by design,
characterization and correlation with statistical process controls. The
minimum retention specification applies for devices whose EEPROM has
been cycled less than the minimum endurance specification.
Note 11: EEPROM endurance and retention will be degraded when
T
J
> 105°C.
Note 12: The LTC2979 will not acknowledge any PMBus commands
while a mass write operation is being executed. This includes the
STORE_USER_ALL and MFR_FAULT_LOG_STORE commands or a
fault log store initiated by a channel faulting off.
Note 13: Maximum capacitive load, C
B
, for SCL and SDA is 400pF. Data
and clock rise time (t
r
) and fall time (t
f
) are:
(20 + 0.1 • C
B
) (ns) < t
r
< 300ns and (20 + 0.1 • C
B
) (ns) < t
f
< 300ns.
C
B
= capacitance of one bus line in pF. SCL and SDA external pull-up
voltage, V
IO
, is 3.13V < V
IO
< 5.5V.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
SP
Pulse Width of Spike Suppressed
(Note 13)
98 ns
t
TIMEOUT_BUS
Time Allowed to Complete any PMBus
Command After Which Time SDA Will
Be Released and Command Terminated
Mfr_config_all_longer_pmbus_timeout = 0
Mfr_config_all_longer_pmbus_timeout = 1
l
l
25
200
35
280
ms
ms
Additional Digital Timing Characteristics
t
OFF_MIN
Minimum Off Time for Any Channel 100 ms
PMBUS TIMING DIAGRAM
SCL
t
HD(STA)
t
HD(DAT)
t
SU(STA)
t
SU(STO)
t
SU(DAT)
t
LOW
t
HD(STA)
t
SP
t
BUF
START
STOP
REPEATED START
START
t
r
t
f
t
r
t
f
t
HIGH
