LTC2956
19
2956fa
For more information www.linear.com/LTC2956
LTC2956 PB pin, the parasitic capacitance and parasitic
series inductance of the connecting cable or PCB trace
can cause erratic behavior. The parasitic capacitance can
couple external noise onto the PB input; placing a 0.1μF
capacitor at the pin lessens the impact of this coupling.
The parasitic series inductance may cause unpredictable
ringing at the PB pin; placing a 5.1k resistor from the PB
pin to the pushbutton switch reduces this ringing. Figure
13 shows an example of this RC network at the PB pin.
External Pull-Up Resistor on PB Pin
An internal 900k pull-up resistor on the PB pin makes an
external pull-up resistor unnecessary. Leakage current on
the PB board trace, however, will affect the open circuit
voltage on the PB pin. If the leakage is too large (>2μA),
the PB voltage may fall close to the threshold window. To
mitigate the effect of board leakage, a 10k pull-up resistor
to V
IN
can be used (see Figure 14).
APPLICATIONS INFORMATION
Enhancing V
IN
Ruggedness and Reverse Battery
Protection
Placing a 1k resistor and a 10nF capacitor at the V
IN
pin can
be used to enhance ruggedness in some applications (see
Figure 15). The peak operating current of the LTC2956 is
less than 10μA, creating an insignificant 10mV drop across
the 1k resistor. The 10nF bypass capacitor in combination
with the 1k series resistor can protect against high voltage
input transients that momentarily exceed the 40V absolute
maximum voltage rating of the V
IN
pin. These can occur
during hot-plugging into a battery or AC adapter. This R-C
filter can also protect against transients that may appear
on the PCB ground during large ESD strikes at the PB pin.
A 1k resistor in series with the V
IN
pin also allows the
LTC2956 to withstand reverse-input voltages up to –40V.
The LTC2956’s V
IN
pin is internally clamped to one diode
voltage below ground and can tolerate up to 50mA of
reverse current. In applications where a battery could
be inserted backwards, this resistor will limit the reverse
current to a safe level thus allowing internal clamping to
protect the pin.
Figures 16a and 16b shows some additional simple re-
verse battery protection circuits that use a single MOSFET.
Figure 16a illustrates a high-side PMOS in the power
path while Figure 16b shows a low-side NMOS in the
ground path. In each circuit, the MOSFET body diode is
orientated in the direction of normal current flow. When
the battery is installed incorrectly, the NMOS/PMOS gate
is low/high, thus preventing the circuit from turning on.
When the battery is properly installed, the NMOS/PMOS
FET gate voltage is taken high/low, and its channel shorts
out the diode.
Figure 13. Noisy PB Trace
Figure 14. External Pull-Up Resistor on PB Pin for
Board Leakage Greater than 2µA
Figure 15. Enhancing V
IN
Ruggedness
V
IN
PB
IN
LTC2956-1
GND
C5
0.1µF
TRACE
CAPACITANCE
TRACE
INDUCTANCE
NOISE
PARASITICS
R8
5.1k
V
IN
V
IN
PB
LTC2956-1/
LTC2956-2
GND
V
CC
>2µA
EXTERNAL BOARD
LEAKAGE CURRENT
R8
10k
900k
0.9V
PB
GND
R7
1k
C1
10nF
V
IN
LTC2956-1
