C8051F700-DK
4 Rev. 0.3
4.3. System Requirements
The Silicon Laboratories IDE requirements:
Pentium-class host PC running Windows 2000 or later.
One available USB port.
4.4. Third-Party Toolsets
The Silicon Laboratories IDE has native support for many 8051 compilers. Natively-supported tools are as follows:
Keil
IAR
Raisonance
Tasking
Hi-Tech
SDCC
Specific instructions for integrating each of the supported tools can be found in the application notes section of the
CD, or on the Silicon Labs web site (http://www.silabs.com).
4.5. Getting Started With the Silicon Labs IDE
The following sections discuss how to create a new project with the IDE, build the source code, and download it to
the target device.
4.5.1. Creating a New Project
1. Select Project
New Project to open a new project and reset all configuration settings to default.
2. Select File
New File to open an editor window. Create your source file(s) and save the file(s) with a rec-
ognized extension, such as .c, .h, or .asm, to enable color syntax highlighting.
3. Right-click on “New Project” in the Project Window. Select Add files to project. Select files in the file
browser and click Open. Continue adding files until all project files have been added.
4. For each of the files in the
Project
Window
that you want assembled, compiled and linked into the target
build, right-click on the file name and select
Add file to build
. Each file will be assembled or compiled as
appropriate (based on file extension) and linked into the build of the absolute object file.
Note:
If a project contains a large number of files, the “Group” feature of the IDE can be used to organize.
Right-click on “New Project” in the
Project Window
. Select
Add Groups to project
. Add pre-defined
groups or add customized groups. Right-click on the group name and choose
Add file to group
. Select files
to be added. Continue adding files until all project files have been added.
4.5.2. Building and Downloading the Program for Debugging
1. Once all source files have been added to the target build, build the project by clicking on the Build/Make
Project button in the toolbar or selecting Project
Build/Make Project from the menu.
Note: After the project has been built the first time, the Build/Make Project command will only build the
files that have been changed since the previous build. To rebuild all files and project dependencies, click
on the Rebuild All button in the toolbar or select Project
Rebuild All from the menu.
2.
Before connecting to the target device, several connection options may need to be set.
Open the
Connection Options
window by selecting
Options
Connection Options...
in the IDE menu. First, select
the “USB Debug Adapter” option. Next, the correct “Debug Interface” must be selected.
C8051F700
devices
use Silicon Labs “
C2
” 2-wire debug interface. Once all the selections are made, click the
OK
button to close
the window.
3. Click the
Connect
button in the toolbar or select
Debug
Connect
from the menu to connect to the device.
4. Download the project to the target by clicking the Download Code button in the toolbar.
C8051F700-DK
Rev. 0.3 5
Note: To enable automatic downloading if the program build is successful select Enable automatic con-
nect/download after build in the Project
Target Build Configuration dialog. If errors occur during the
build process, the IDE will not attempt the download.
5. Save the project when finished with the debug session to preserve the current target build configuration,
editor settings and the location of all open debug views. To save the project, select Project
Save Project
As... from the menu. Create a new name for the project and click on Save.
5. Example Source Code
Example source code and register definition files are provided in the “SiLabs\MCU\Examples\C8051F70x_71x\
directory during IDE installation. These files may be used as a template for code development. The comments in
each example file indicate which development tool chains were used when testing.
5.1. Register Definition Files
Register definition files C8051F70x.inc, C8051F70x_defs.h and compiler_defs.h define all SFR registers and bit-
addressable control/status bits. They are installed into the “SiLabs\MCU\Examples\C8051F70x_71x\” directory
during IDE installation. The register and bit names are identical to those used in the C8051F70x datasheet.
5.2. Blinking LED Example
The example source files F70x_Blinky.asm and F70x_Blinky.c installed in the default directory
“SiLabs\MCU\Examples\C8051F70x_71x\Blinky” show examples of several basic C8051F700 functions. These
include disabling the watchdog timer (WDT), configuring the Port I/O crossbar, configuring a timer for an interrupt
routine, initializing the system clock, and configuring a GPIO port pin. When compiled/assembled and linked this
program flashes the green LED (DS3) on the C8051F700 Target Board about five times a second using the
interrupt handler with a C8051F700 timer.
5.3. Capacitive Sense Switch Example
The example source file F70x_CS0.c demonstrates the configuration and usage of the capacitive sense switches
located on P2.0 through P2.3. Refer to the source file for step-by-step instructions to build and test this example.
This is installed in the “SiLabs\MCU\Examples\C8051F70x_71x\ CS0\” directory by default.
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6 Rev. 0.3
6. Target Board
The C8051F700 Development Kit includes a target board with a C8051F700 device pre-installed for evaluation and
preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping
using the target board. Refer to Figure 2 for the locations of the various I/O connectors. Figure 2 shows the factory
default shorting block positions.
DS1 LED indicates that the USB connection is providing power to the USB to UART device U2
DS2 LED indicates whether power is being supplied through selection made on J15
DS3 LED connects to P1.0 through J8
P1 Expansion connector (96-pin)
P2 Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
P3 DEBUG connector for Debug Adapter interface
P4 USB connector (connects to PC for serial communication)
J0 - J6 Port I/O headers (provide access to Port I/O pins)
J7 Provides easily accessible ground clip
J8 Connects P1.0 to LED DS3 and P1.1 to switch SW1
J9 Connects P0.2 (XTAL1) to one terminal of Y1
J10 Connects P0.3 (XTAL2) to one terminal of Y1
J11 Selects either on-board regulator or USB debug adapter as VDD_LDO power source
J12 Connects port I/O to the UART0 interface
J13 Connects P0.0/VREF to bypass capacitor
J14 Connects P0.1/AGND to GND
J15 Selects one of the available power sources as the board supply
J16 Connects P1.2 to potentiometer R8
SW1 Switch connected to the MCU I/O pin P1.1
SW2 Switch connected to the reset pin of the MCU
TB1 Analog I/O terminal block

C8051F700DK

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Development Boards & Kits - 8051 C8051F700 MCU Family Development Kit
Lifecycle:
New from this manufacturer.
Delivery:
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