1. General description
The 74HC86; 74HCT86 are high-speed Si-gate CMOS devices that comply with JEDEC
standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL).
The 74HC86; 74HCT86 provides a 2-input EXCLUSIVE-OR function.
2. Features and benefits
Input levels:
For 74HC86: CMOS level
For 74HCT86: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
74HC86; 74HCT86
Quad 2-input EXCLUSIVE-OR gate
Rev. 3 — 27 August 2012 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC86N 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74HCT86N
74HC86D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
74HCT86D
74HC86DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body
width 5.3 mm
SOT337-1
74HCT86DB
74HC86PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74HCT86PW
74HC_HCT86 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 2 of 16
NXP Semiconductors
74HC86; 74HCT86
Quad 2-input EXCLUSIVE-OR gate
4. Functional diagram
Fig 1. Logic symbol
mna787
1A
1B
1Y
2
1
3
2A
2B
2Y
5
4
6
3A
3B
3Y
10
9
8
4A
4B
4Y
13
12
11
Fig 2. Logic diagram (one gate) Fig 3. IEC logic symbol
mna788
Y
A
B
mna786
3
=1
=1
=1
=1
2
1
6
5
4
8
10
9
11
13
12
74HC_HCT86 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 27 August 2012 3 of 16
NXP Semiconductors
74HC86; 74HCT86
Quad 2-input EXCLUSIVE-OR gate
5. Pinning information
5.1 Pinning
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level.
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14
86
1A V
CC
1B 4B
1Y 4A
2A 4Y
2B 3B
2Y 3A
GND 3Y
001aad103
1
2
3
4
5
6
7 8
10
9
12
11
14
13
Table 2. Pin description
Symbol Pin Description
1A to 4A 1, 4, 9, 12 data input
1B to 4B 2, 5, 10, 13 data input
1Y to 4Y 3, 6, 8, 11 data output
GND 7 ground (0 V)
V
CC
14 supply voltage
Table 3. Function table
[1]
Input nA Input nB Output nY
LLL
LHH
HLH
HHL

74HCT86N,652

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Logic Gates QUAD EXCL OR GATE
Lifecycle:
New from this manufacturer.
Delivery:
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