LT3641
4
3641fa
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3641E is guaranteed to meet performance specifi cations
from 0°C to 125°C junction temperature. Specifi cations over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3641I is guaranteed and tested over the full –40°C to 125°C operating
junction temperature range. The LT3641H is guaranteed and tested over
the full –40°C to 150°C operating junction temperature range.
Note 3: SW1, SW2 current limit is guaranteed by design and/or correlation
to static test. Slope compensation reduces current limit at higher duty
cycle.
PARAMETER CONDITIONS MIN TYP MAX UNITS
SS1, SS2 Charge Current SS1 = 0.5V, SS2 = 0.5V 1.3 2.0 2.7 μA
SS1 to FB1 Offset Voltage SS1 = 0.6V 5 30 mV
SS2 to FB2 Offset Voltage SS2 = 0.3V 5 30 mV
RST1 Threshold as Percentage of V
FB1
l
90 92 94 %
RST2 Threshold as Percentage of V
FB1
l
88 91 94 %
Undervoltage to RST Assert Time 20 μs
RST1, RST2, WDO Pull-Up Current RST1, RST2, WDO = 0V 5 15 30 μA
RST1, RST2, WDO Output Voltage I
RST1
, I
RST2
, I
WDO
= 2mA 150 250 mV
RST1, RST2 Timeout Period (t
RST
) CPOR = 220pF
l
8 9.5 11 ms
Watchdog Start Delay Time (t
DLY
) CWDT = 820pF 14 16 18 ms
Watchdog Upper Boundary (t
WDU
) CWDT = 820pF
l
27 32 35 ms
Watchdog Lower Boundary (t
WDL
) CWDT = 820pF
l
1.68 2 2.2 ms
WDI Pull-Up Current WDI = 1.2V 4 μA
WDI Voltage Threshold 0.55 0.85 1.15 V
WDI Low Minimum Pulse Width 300 ns
WDI High Minimum Pulse Width 300 ns
WDE Pull-Down Current WDE = 2V 1 μA
WDE Threshold
l
0.5 0.7 0.9 V
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C. V
IN
= 12V, V
IN2
= 3.3V, EN/UVLO = 12V, EN2 = 3.3V, unless otherwise noted.
Note 4: The oscillator cycle is extended when DA current exceeds its limit.
DA current limit is fl at over duty cycle.
Note 5: If the SW2 NMOS current exceeds its limit at the start of an
oscillator cycle, the PMOS will not be turned on in the cycle.
Note 6: The QFN switch R
DS(ON)
is guaranteed by correlation to wafer level
measurement.
Note 7: Absolute Maximum Voltage at V
IN
and EN/UVLO pins is 55V for
nonrepetitive 1 second transients, and 42V for continuous operation.
Note 8: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specifi ed maximum operating junction temperature may impair device
reliability.
ELECTRICAL CHARACTERISTICS
LT3641
5
3641fa
TYPICAL PERFORMANCE CHARACTERISTICS
LV Channel Effi ciency
(2MHz, V
OUT2
= 1.8V)
Quiescent Current vs V
IN
Quiescent Current vs Temperature
HV Channel Effi ciency
(2MHz, V
OUT1
= 3.3V)
HV Channel Effi ciency
(2MHz, V
OUT1
= 5V)
LV Channel Effi ciency
(2MHz, V
OUT2
= 1.2V)
T
A
= 25°C, unless otherwise noted.
FB1 Voltage vs Temperature
FB1 Voltage vs SS1
FB2 Voltage vs Temperature
V
OUT1
CURRENT (A)
0
70
EFFICIENCY (%)
80
0.2 0.4 0.80.6 1.0
90
75
85
1.2
3641 G01
V
IN
= 12V
V
IN
= 24V
V
IN
= 16V
V
OUT1
CURRENT (A)
0
65
EFFICIENCY (%)
80
0.2 0.4 0.80.6 1.0
95
90
70
75
85
1.2 1.4 1.6 1.8
3641 G02
V
IN
= 12V
V
IN
= 24V
V
IN
= 36V
V
IN
= 48V
V
OUT2
CURRENT (A)
0
70
EFFICIENCY (%)
80
0.2 0.4 0.80.6 1.0
90
75
85
3641 G04
V
IN2
= 3.3V
V
IN2
= 5V
V
IN
VOLTAGE (V)
0
V
IN
QUIESCENT CURRENT (mA)
0.20
0.25
0.30
0.15
0.10
20
10
30 40
0.05
0.00
0.35
3641 G05
TEMPERATURE (°C)
–50
V
IN
QUIESCENT CURRENT (μA)
200
250
300
150
100
50
0
100 150
50
0
350
3641 G06
TEMPERATURE (°C)
–50
FB1 VOLTAGE (V)
50
0
100 150
3641 G07
1.00
1.10
1.20
1.30
1.40
1.05
1.15
1.25
1.35
REGULATION
RST1 THRESHOLD
SS1 VOLTAGE (V)
FB1 VOLTAGE (V)
1.00
0.5
1.5 2.0
3641 G08
0.0
0.4
0.8
1.2
1.4
0.2
0.6
1.0
TEMPERATURE (°C)
–50
FB2 VOLTAGE (V)
50
0
100 150
3641 G09
0.45
0.55
0.65
0.70
0.50
0.60
REGULATION
RST2 THRESHOLD
V
OUT2
CURRENT (A)
0
70
EFFICIENCY (%)
80
0.2 0.4 0.80.6 1.0
90
75
85
3641 G03
V
IN2
= 3.3V
V
IN2
= 5V
LT3641
6
3641fa
TYPICAL PERFORMANCE CHARACTERISTICS
FB2 Voltage vs SS2
Switching Frequency
vs Temperature
HV Channel Current Limit
vs Duty Cycle
V
OUT1
Minimum Load to Run at
Full Frequency (V
OUT1
= 3.3V)
HV Channel Switching Frequency
(V
OUT1
= 3.3V)
LV Channel Switching Frequency
(V
OUT2
= 1.8V)
LV Channel Peak Current Limit
vs Duty Cycle
LV Channel Switch Voltage
Drop vs Current (V
IN2
= 3.3V)
T
A
= 25°C, unless otherwise noted.
SS2 VOLTAGE (mV)
FB2 VOLTAGE (mV)
3641 G10
0
200
400
600
700
100
300
500
0
200
400 6000 800 1000
TEMPERATURE (°C)
–50
SWITCHING FREQUENCY (MHz)
50
0
100 150
3641 G11
0.48
0.50
0.52
0.49
0.51
R
T
= 182k
DUTY CYCLE (%)
SW1 PEAK CURRENT LIMIT (A)
3641 G12
0
20
40 60 80 100
0.0
1.0
2.0
2.5
0.5
1.5
DUTY CYCLE (%)
SW2 PEAK CURRENT LIMIT (A)
3641 G13
0
20
40 60 80 100
0.0
1.0
2.0
0.5
1.5
SW2 CURRENT (A)
0
SW2 VOLTAGE DROP (mV)
300
350
400
250
200
0.5 1 1.5
50
0
150
450
100
3641 G14
PMOS
NMOS
V
IN
VOLTAGE (V)
0
V
OUT1
CURRENT (A)
0.30
0.35
0.40
0.25
0.20
51510 20 25 30
0.05
0
0.15
0.45
0.10
3641 G15
2MHz
2.5MHz
V
OUT1
CURRENT (A)
SWITCHING FREQUENCY (MHz)
3641 G16
0
1.0
2.0
2.5
0.5
1.5
0
0.2
0.4 0.6 0.8
1.0 1.2
V
IN
= 12V
V
IN
= 24V
V
IN
= 16V
R
T
= 32.4k
V
OUT2
CURRENT (A)
SWITCHING FREQUENCY (MHz)
3641 G17
0
1.0
2.0
2.5
0.5
1.5
0
0.2
0.4 0.6 0.8
1.0
V
IN2
= 3.3V
V
IN2
= 5V
EN2 VOLTAGE (V)
EN2 CURRENT (μA)
3641 G17a
0
10
20
25
30
5
15
0
2
46
EN2 Current vs Voltage

LT3641IUFD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 42V Dual Monolithic Buck Regulator with Power-On Reset and Watchdog Timer
Lifecycle:
New from this manufacturer.
Delivery:
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