19
2545ES–AVR–02/05
ATmega48/88/168
6.3 32M1-A
2325 Orchard Parkway
San Jose, CA 95131
TITLE
DRAWING NO.
R
REV.
32M1-A, 32-pad, 5 x 5 x 1.0 mm Body, Lead Pitch 0.50 mm,
D
32M1-A
8/19/04
3.10 mm Exposed Pad, Micro Lead Frame Package (MLF)
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
NOM
MAX
NOTE
D1
D
E1
E
e
b
A3
A2
A1
A
D2
E2
0.08
C
L
1
2
3
P
P
0
1
2
3
A 0.80 0.90 1.00
A1 0.02 0.05
A2 0.65 1.00
A3 0.20 REF
b 0.18 0.23 0.30
D 5.00 BSC
D1 4.75 BSC
D2 2.95 3.10 3.25
E 5.00 BSC
E1 4.75BSC
E2 2.95 3.10 3.25
e 0.50 BSC
L 0.30 0.40 0.50
P 0.60
12
o
Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2.
TOP VIEW
SIDE VIEW
BOTTOM VIEW
0
Pin 1 ID
Pin #1 Notch
(0.20 R)
K 0.20
K
K
20
2545ES–AVR–02/05
ATmega48/88/168
7. Errata
7.1 Errata ATmega48
The revision letter in this section refers to the revision of the ATmega48 device.
7.1.1 Rev A
Wrong values read after Erase Only operation
Watchdog Timer Interrupt disabled
Start-up time with Crystal Oscillator is higher than expected
High Power Consumption in Power-down with External Clock
Asynchronous Oscillator does not stop in Power-down
1. Wrong values read after Erase Only operation
At supply voltages below 2.7 V, an EEPROM location that is erased by the Erase Only operation
may read as programmed (0x00).
Problem Fix/Workaround
If it is necessary to read an EEPROM location after Erase Only, use an Atomic Write operation
with 0xFF as data in order to erase a location. In any case, the Write Only operation can be used
as intended. Thus no special considerations are needed as long as the erased location is not
read before it is programmed.
2. Watchdog Timer Interrupt disabled
If the watchdog timer interrupt flag is not cleared before a new timeout occurs, the watchdog will
be disabled, and the interrupt flag will automatically be cleared. This is only applicable in inter-
rupt only mode. If the Watchdog is configured to reset the device in the watchdog time-out
following an interrupt, the device works correctly.
Problem fix / Workaround
Make sure there is enough time to always service the first timeout event before a new watchdog
timeout occurs. This is done by selecting a long enough time-out period.
3. Start-up time with Crystal Oscillator is higher than expected
The clock counting part of the start-up time is about 2 times higher than expected for all start-up
periods when running on an external Crystal. This applies only when waking up by reset. Wake-
up from power down is not affected. For most settings, the clock counting parts is a small frac-
tion of the overall start-up time, and thus, the problem can be ignored. The exception is when
using a very low frequency crystal like for instance a 32 kHz clock crystal.
Problem fix / Workaround
No known workaround.
4. High Power Consumption in Power-down with External Clock
The power consumption in power down with an active external clock is about 10 times higher
than when using internal RC or external oscillators.
Problem fix / Workaround
Stop the external clock when the device is in power down.
5. Asynchronous Oscillator does not stop in Power-down
21
2545ES–AVR–02/05
ATmega48/88/168
The Asynchronous oscillator does not stop when entering power down mode. This leads to
higher power consumption than expected.
Problem fix / Workaround
Manually disable the asynchronous timer before entering power down.
7.2 Errata ATmega88
The revision letter in this section refers to the revision of the ATmega88 device.
7.2.1 Rev. A
Writing to EEPROM does not work at low Operating Voltages
Part may hang in reset
1. Writing to EEPROM does not work at low operating voltages
Writing to the EEPROM does not work at low voltages.
Problem Fix/Workaround
Do not write the EEPROM at voltages below 4.5 Volts.
This will be corrected in rev. B.
2. Part may hang in reset
Some parts may get stuck in a reset state when a reset signal is applied when the internal reset
state-machine is in a specific state. The internal reset state-machine is in this state for approxi-
mately 10 ns immediately before the part wakes up after a reset, and in a 10 ns window when
altering the system clock prescaler. The problem is most often seen during In-System Program-
ming of the device. There are theoretical possibilities of this happening also in run-mode. The
following three cases can trigger the device to get stuck in a reset-state:
- Two succeeding resets are applied where the second reset occurs in the 10ns window before
the device is out of the reset-state caused by the first reset.
- A reset is applied in a 10 ns window while the system clock prescaler value is updated by
software.
- Leaving SPI-programming mode generates an internal reset signal that can trigger this case.
The two first cases can occur during normal operating mode, while the last case occurs only dur-
ing programming of the device.
Problem Fix/Workaround
The first case can be avoided during run-mode by ensuring that only one reset source is active.
If an external reset push button is used, the reset start-up time should be selected such that the
reset line is fully debounced during the start-up time.
The second case can be avoided by not using the system clock prescaler.
The third case occurs during In-System programming only. It is most frequently seen when using
the internal RC at maximum frequency.
If the device gets stuck in the reset-state, turn power off, then on again to get the device out of
this state.
7.2.2 Rev. D
No errata.

ATMEGA88-20AUR

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
8-bit Microcontrollers - MCU AVR 8K FLSH 2KB EE 4KB SRAM-20MHz 5V
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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