IRF6613TRPBF

IRF6613PbF
4 www.irf.com
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
25 50 75 100 125 150
T
J
, Junction Temperature (°C)
0
30
60
90
120
150
I
D
,
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
0.2 0.4 0.6 0.8 1.0 1.2 1.4
V
SD
, Source-to-Drain Voltage (V)
0.1
1.0
10.0
100.0
1000.0
I
S
D
,
R
e
v
e
r
s
e
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
T
J
= 25°C
T
J
= 150°C
V
GS
= 0V
0 1 10 100 1000
V
DS
, Drain-toSource Voltage (V)
0.01
0.1
1
10
100
1000
I
D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
Tc = 25°C
Tj = 150°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R
DS
(on)
100µsec
-75 -50 -25 0 25 50 75 100 125 150
T
J
, Temperature ( °C )
0.5
1.0
1.5
2.0
2.5
V
G
S
(
t
h
)
G
a
t
e
t
h
r
e
s
h
o
l
d
V
o
l
t
a
g
e
(
V
)
I
D
= 250µA
1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100
t
1
, Rectangular Pulse Duration (sec)
0.0001
0.001
0.01
0.1
1
10
100
T
h
e
r
m
a
l
R
e
s
p
o
n
s
e
(
Z
t
h
J
A
)
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
τ
J
τ
J
τ
1
τ
1
τ
2
τ
2
τ
3
τ
3
R
1
R
1
R
2
R
2
R
3
R
3
Ci i/Ri
Ci= τi/Ri
τ
τ
C
τ
4
τ
4
R
4
R
4
Ri (°C/W) τi (sec)
0.6784 0.00086
17.299 0.57756
17.566 8.94
9.4701 106
τ
A
IRF6613PbF
www.irf.com 5
Fig 13c. Maximum Avalanche Energy Vs. Drain Current
Fig 14a. Switching Time Test Circuit
Fig 14b. Switching Time Waveforms
V
GS
V
DS
90%
10%
t
d(on)
t
d(off)
t
r
t
f
V
GS
Pulse Width < 1µs
Duty Factor < 0.1%
V
DD
V
DS
L
D
D.U.T
+
-
Fig 13b. Unclamped Inductive Waveforms
Fig 13a. Unclamped Inductive Test Circuit
t
p
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
V
DS
+
-
V
DD
DRIVER
A
15V
20V
V
GS
Fig 12. On-Resistance Vs. Gate Voltage
Fig 15. Gate Charge Test Circuit
Fig 16. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1
Qgs2 Qgd Qgodr
25 50 75 100 125 150
Starting T
J
, Junction Temperature (°C)
0
200
400
600
800
1000
E
A
S
,
S
i
n
g
l
e
P
u
l
s
e
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
I
D
TOP
6.7A
8.1A
BOTTOM
18A
2.0 4.0 6.0 8.0 10.0
V
GS
, Gate-to-Source Voltage (V)
2.0
3.0
4.0
5.0
6.0
7.0
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
m
)
T
J
= 25°C
T
J
= 125°C
I
D
= 23A
1K
VCC
DUT
0
L
IRF6613PbF
6 www.irf.com
Fig 17. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET
®
Power MOSFETs
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P. W .
Period
* V
GS
= 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
R
G
V
DD
di/dt controlled by R
G
Driver same type as D.U.T.
I
SD
controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
Inductor Current
DirectFET Substrate and PCB Layout, MT Outline
(Medium Size Can, T-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET.
This includes all recommendations for stencil and substrate designs.
G = GATE
D = DRAIN
S = SOURCE
G
D
DD
D
S
S

IRF6613TRPBF

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
MOSFET 40V N-CH HEXFET 3.4mOhms 42nC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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