NB6L14
http://onsemi.com
5
Table 6. AC CHARACTERISTICS V
CC
= 2.375 V to 3.63 V, GND = 0 V, T
A
= −40°C to +85°C (Note 9)
Symbol
Characteristic Min Typ Max Unit
V
OUTPP
Output Voltage Amplitude (@ V
INPPmin
) (Note 10)
f
IN
≤ 1.25 GHz
1.25 GHz ≤ f
in
≤ 2.0 GHz
2.0 GHz ≤ f
in
≤ 3.0 GHz
550
380
250
700
500
320
mV
f
DATA
Maximum Operating Data Rate 2.5 Gb/s
t
PD
Propagation Delay IN to Q 250 370 500 ps
t
S
Set−Up Time (Note 11) EN to IN, IN 300 ps
t
H
Hold Time (Note 11) EN to IN, IN 300 ps
t
SKEW
Within−Device Skew (Note 12)
Device to Device Skew (Note 13)
5.0 20
150
ps
t
JITTER
RMS Random Jitter (Note 14)
f
IN
= 2.5 GHz
Peak−to−Peak Data Dependent Jitter
(Note 15) f
DATA
= 2.5 Gb/s 14
1.0
ps
V
INPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 10)
100 V
CC
− GND mV
t
r
,t
f
Output Rise/Fall Times @ Full Output Swing
(20%−80%)
70 150 200 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. Measured by forcing V
INPP
(min) from a 50% duty cycle clock source. All loading with an external R
L
= 50 to V
CC
– 2.0 V. Input edge rates
40 ps (20%−80%).
10.Input and output voltage swing is a single−ended measurement operating in differential mode.
11. Set−up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous
applications, set−up and hold times do not apply.
12.Within device skew is measured between two different outputs under identical power supply, temperature and input conditions.
13.Device to device skew is measured between outputs under identical transition @ 0.5 GHz.
14.Additive RMS jitter with 50% duty cycle clock signal.
15.Additive peak−to−peak data dependent jitter with input NRZ data at PRBS 2
^23
−1 and K28.5 at 2.5Gb/s.
800
700
600
500
400
300
200
100
0
0123
f
out
, CLOCK OUTPUT FREQUENCY (GHz)
V
OUTPP
OUTPUT VOLTAGE AMPLITUDE (mV)
(TYPICAL)
Figure 4. Output Voltage Amplitude (V
OUTPP
) versus Output
Frequency at Ambient Temperature (Typical)
