DG421/DG423/DG425
Improved Low-Power,
CMOS Analog Switches with Latches
4 _______________________________________________________________________________________
50
55
20
-20
ON-RESISTANCE vs. V
D
(DUAL-SUPPLIES)
25
45
MAX401-1
V
D
(V)
r
DS
(ON)
()
10
35
30
-10 0 20
40
15
10
5
A: V+ = 5V, V- = -5V
B: V+ = 10V, V- = -10V
C: V+ = 15V, V- = -15V
D: V+ = 20V, V- = -20V
A
B
C
D
35
5
-20
ON-RESISTANCE vs. V
D
AND 
TEMPERATURE (DUAL SUPPLIES)
10
30
MAX401-2
V
D
(V)
r
DS
(ON)
()
20
20
15
-10 10
25
0
V+ = 15V, V- = -15V
T
A
= +125°C
T
A
= +85°C
T
A
= +25°C
T
A
= -55°C
140
20
0
ON-RESISTANCE vs. V
D
(SINGLE SUPPLY)
40
120
MAX401-3
V
D
(V)
r
DS
(ON)
()
20
80
60
515
100
10
V+ = 5V
V- = 0V
V+ = 10V
V+ = 15V
V+ = 20V
70
10
0
ON-RESISTANCE vs. V
D
AND
TEMPERATURE (SINGLE SUPPLY)
20
60
MAX401-4
V
D
(V)
r
DS
(ON)
()
20
40
30
515
50
10
V+ = 12V, V- = 0V
T
A
= +125°C
T
A
= +85°C
T
A
= +25°C
100
0.0001
-75 125
OFF LEAKAGE CURRENTS vs.
TEMPERATURE
0.001
10
MAX401-5
TEMPERATURE (°C)
OFF LEAKAGE (nA)
0.1
0.01
25
1
V+ = 16.5V
V- = -16.5V
V
D
= ±15V
V
S
= ±15V
100
0.0001
-75 125
ON LEAKAGE CURRENTS vs.
TEMPERATURE
0.001
10
MAX401-6
TEMPERATURE (°C)
ON LEAKAGE (nA)
0.1
0.01
25
1
V+ = 16.5V
V- = -16.5V
V
D
= ±15V
V
S
= ±15V
60
-60
-20 20
CHARGE INJECTION vs.
ANALOG VOLTAGE
-40
40
MAX401-7
V
D
(V)
Q (pC)
10
0
-20
-10 0
20
V+ = 15V, V- = -15V
100
0.0001
-75 125
SUPPLY CURRENT vs.
TEMPERATURE
0.001
10
MAX401-8
TEMPERATURE (°C)
I+, I-, I
L
(µA)
0.1
0.01
25
1
I+ at V+ = 16.5V
I- at V- = -16.5V
I
L
at V
L
= 5V
__________________________________________Typical Operating Characteristics
(T
A
= +25°C, unless otherwise noted.)
DG421/DG423/DG425
Improved Low-Power,
CMOS Analog Switches with Latches
_______________________________________________________________________________________ 5
___________________Pin Descriptions
1, 8 D1, D2 Drain Terminals
2
W
R
Write Select
3, 4, 5, 6 N.C. No Internal Connection
7
R
S
Reset Select
9, 16 S1, S2 Source Terminals
10, 15 IN1, IN2 Input Control
11 V+ Positive Supply
12 V
L
Logic Supply
13 GND Ground
14 V- Negative Supply
1, 8, 3, 6 2, 10, 4, 8 Drain Terminals
2 3 Write Select
W
R
16, 9, 4, 5 20, 12, 5, 7 Source TerminalsS1-S4
7 9 Resets Select
D1-D4
15, 10 19, 13 Input ControlIN1, IN2
11 14 Positive SupplyV+
R
S
12 15 Logic SupplyV
L
1, 6, 11, 16 No Internal ConnectionN.C.
14 18 Negative SupplyV-
13 17 GroundGND
PIN NAME FUNCTION
DIP PLCC FUNCTIONNAME
Figure 1. Overvoltage Protection Using External Blocking Diodes
__________Applications Information
Operation with Supply Voltages
Other Than ±15V
The DG421/DG423/DG425 switches operate with ±4.5V
to ±20V bipolar supplies or with a +10V to +30V single
supply. In either case, analog signals ranging from V+
to V- can be switched. The
Typical Operating
Characteristics
graphs illustrate typical analog-signal
and supply-voltage on-resistance variations. The usual
on-resistance temperature coefficient is 0.5%/°C (typ).
Logic Inputs
These devices operate with a single positive supply or
with bipolar supplies. They maintain TTL compatibility
with supplies anywhere in the ±4.5V to ±20V range as
long as V
L
= +5V. If V
L
is connected to V+ or another
supply at voltages other than +5V, the devices will
operate at CMOS-logic-level inputs.
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings because stresses beyond the listed rat-
ings may cause permanent damage to the devices.
Always sequence V+ on first, followed by V
L
, V-, and
logic inputs. If power-supply sequencing is not possi-
ble, add two small, external signal diodes in series with
supply pins for overvoltage protection (Figure 1).
Adding diodes reduces the analog signal range to 1V
below V+ and 1V above V-, without affecting low switch
resistance and low leakage characteristics. Device
operation is unchanged, and the difference between V+
and V- should not exceed +44V.
V+
D
V-
S
V
g
DG421
DG423/DG425
DG421/DG423/DG425
Improved Low-Power,
CMOS Analog Switches with Latches
6 _______________________________________________________________________________________
D
-15V
( )
V-
R
L
V
OUT
V+
+15V+5V
V
L
GND
V
D
= 10V for t
ON
V
D
= -10V for t
OFF
IN
LOGIC
INPUT
REPEAT TEST FOR IN2 AND S2.
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
C
L
SWITCH OUTPUT
S
LOGIC
INPUT
SWITCH
OUTPUT
t
R
< 20ns
t
F
< 20ns
V
OUT
t
OFF
50%
3V
0V
0V
NOTE: LOGIC INPUT WAVEFORM IS INVERTED FOR 
SWITCHES THAT HAVE THE OPPOSITE LOGIC SENSE.
DG421
DG423
DG425
V
OUT
= V
D
R
L
R
L
+ r
DS(ON)
0.9 x V
OUT
0.9 x V
OUT
-V
OUT
t
ON
*V
D
= 10V for t
ON
, V
D
= -10V for t
OFF
Figure 2. Switching Time
3V
0
3V
0
3V
0
V
OUT
0
WR
IN
RS
SWITCH
OUTPUT
1.5V
t
WW
t
DW t
WD
2.0V
0.8V
1.5V
t
RS
t
OFF(RS)
0.8 x V
OUT
Figure 3. Latch Timing
V
OUT
is the steady-state output with the switch on. Feedthrough via switch capacitance may result in spikes at the
leading and trailing edge of the output waveform.
______________________________________________Timing Diagrams/Test Circuits

DG421DY+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs Improved Low-Power, CMOS Analog Switches with Latches
Lifecycle:
New from this manufacturer.
Delivery:
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