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MC74LVXT8051DTRG

P1-P3P4-P6P7-P9P10-P12
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 5
1 Publication Order Number:
MC74LVXT8051/D
MC74LVXT8051
Analog Multiplexer/
Demultiplexer
High−Performance Silicon−Gate CMOS
The MC74LVXT8051 utilizes silicon−gate CMOS technology to
achieve fast propagation delays, low ON resistances, and low OFF
leakage currents. This analog multiplexer/demultiplexer controls
analog voltages that may vary across the complete power supply range
(from V
CC
to GND).
The LVXT8051 is similar in pinout to the high−speed HC4051A
and the metal−gate MC14051B. The Channel−Select inputs determine
which one of the Analog Inputs/Outputs is to be connected by means
of an analog switch to the Common Output/Input. When the Enable
pin is HIGH, all analog switches are turned off.
The Channel−Select and Enable inputs are compatible with
TTL−type input thresholds. The input protection circuitry on this
device allows overvoltage tolerance on the input, allowing the device
to be used as a logic−level translator from 3.0 V CMOS logic to 5.0V
CMOS Logic or from 1.8V CMOS logic to 3.0 V CMOS Logic while
operating at the higher−voltage power supply.
The MC74LVXT8051 input structure provides protection when
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74LVXT8051 to be used to interface 5.0 V circuits to
3.0 V circuits.
This device has been designed so that the ON resistance (R
on
) is
more linear over input voltage than R
on
of metal−gate CMOS analog
switches.
Features
• Fast Switching and Propagation Speeds
• Low Crosstalk Between Switches
• Diode Protection on All Inputs/Outputs
• Analog Power Supply Range (V
CC
− GND) = 2.0 to 6.0 V
• Digital (Control) Power Supply Range (V
CC
− GND) = 2.0 to 6.0 V
• Improved Linearity and Lower ON Resistance Than Metal−Gate
Counterparts
• Low Noise
• In Compliance With the Requirements of JEDEC Standard No. 7A
• These Devices are Pb−Free and are RoHS Compliant
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
MARKING DIAGRAMS
TSSOP−16
DT SUFFIX
CASE 948F
SOIC−16
D SUFFIX
CASE 751B
LVXT8051G
AWLYWW
1
16
1
16
LVXT8051 = Specific Device Code
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
LVXT
8051
ALYWG
G
TSSOP−16
SOIC−16
PIN ASSIGNMENT
1516 14 13 12 11 10
21 34567
V
CC
9
8
X2 X1 X0 X3 A B C
X4 X6 X X7 X5 Enable NC GND
MC74LVXT8051
http://onsemi.com
2
Figure 1. LOGIC DIAGRAM
Single−Pole, 8−Position Plus Common Off
X0
13
X1
14
X2
15
X3
12
X4
1
X5
5
X6
2
X7
4
A
11
B
10
C
9
ENABLE
6
MULTIPLEXER/
DEMULTIPLEXER
X
3
ANALOG
INPUTS/
CHANNEL
INPUTS
PIN 16 = V
CC
PIN 8 = GND
COMMON
OUTPUT/
INPUT
OUTPUTS
SELECT
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
X
FUNCTION TABLE − MC74LVXT8051
Control Inputs
ON Channels
Enable
Select
CBA
X0
X1
X2
X3
X4
X5
X6
X7
NONE
L
L
L
L
L
L
L
L
H
X = Don’t Care
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
Positive DC Supply Voltage (Referenced to GND) –0.5 to + 7.0 V
V
IS
Analog Input Voltage −0.5 to V
CC
+ 0.5 V
V
in
Digital Input Voltage (Referenced to GND) –0.5 to V
CC
+ 0.5 V
I DC Current, Into or Out of Any Pin −20 mA
P
D
Power Dissipation in Still Air, SOIC Package†
TSSOP Package†
500
450
mW
T
stg
Storage Temperature Range –65 to + 150
_C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds 260
_C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
†Derating: SOIC Package: –7 mW/_C from 65_ to 125_C
TSSOP Package: −6.1 mW/_C from 65_ to 125_C
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance
circuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND v (V
in
or V
out
) v V
CC
.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
MC74LVXT8051
http://onsemi.com
3
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
Positive DC Supply Voltage (Referenced to GND) 2.0 6.0 V
V
IS
Analog Input Voltage 0.0 V
CC
V
V
in
Digital Input Voltage (Referenced to GND) GND V
CC
V
V
IO
* Static or Dynamic Voltage Across Switch 1.2 V
T
A
Operating Temperature Range, All Package Types –55 +85
_C
t
r
, t
f
Input Rise/Fall Time (Channel Select or Enable Inputs) V
CC
= 3.3 V ± 0.3 V
V
CC
= 5.0 V ± 0.5 V
0
0
100
20
ns/V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
*For voltage drops across switch greater than 1.2 V (switch on), excessive V
CC
current may be drawn; i.e., the current out of the switch may
contain both V
CC
and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND)
Symbo
l
Parameter Condition
V
CC
V
Guaranteed Limit
Unit
−55 to 25°C ≤85°C ≤125°C
V
IH
Minimum High−Level Input Voltage,
Channel−Select or Enable Inputs
R
on
= Per Spec 3.0
4.5
5.5
1.2
2.0
2.0
1.2
2.0
2.0
1.2
2.0
2.0
V
V
IL
Maximum Low−Level Input Voltage,
Channel−Select or Enable Inputs
R
on
= Per Spec 3.0
4.5
5.5
0.53
0.8
0.8
0.53
0.8
0.8
0.53
0.8
0.8
V
I
in
Maximum Input Leakage Current,
Channel−Select or Enable Inputs
V
in
= V
CC
or GND 5.5 ±0.1 ±1.0 ±1.0
mA
I
CC
Maximum Quiescent Supply
Current (per Package)
Channel Select, Enable and
V
IS
= V
CC
or GND; V
IO
= 0 V
5.5 4 40 160
mA
DC ELECTRICAL CHARACTERISTICS Analog Section
Symbo
l
Parameter Test Conditions
V
CC
V
Guaranteed Limit
Unit
−55 to 25°C
v85_C v125_C
R
on
Maximum “ON” Resistance
V
in
= V
IL
or V
IH
V
IS
= V
CC
to GND
|I
S
| v 10.0 mA (Figures 1, 2)
3.0
4.5
5.5
40
30
25
45
32
28
50
37
30
W
V
in
= V
IL
or V
IH
V
IS
= V
CC
or GND (Endpoints)
|I
S
| v 10.0 mA (Figures 1, 2)
3.0
4.5
5.5
30
25
20
35
28
25
40
35
30
DR
on
Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Package
V
in
= V
IL
or V
IH
V
IS
= 1/2 (V
CC
− GND)
|I
S
| v 10.0 mA
3.0
4.5
5.5
15
8.0
8.0
20
12
12
25
15
15
W
I
off
Maximum Off−Channel Leakage
Current, Any One Channel
V
in
= V
IL
or V
IH
;
V
IO
= V
CC
or GND;
Switch Off (Figure 3)
5.5 0.1 0.5 1.0
mA
Maximum Off−Channel
Leakage Current,
Common Channel
V
in
= V
IL
or V
IH
;
V
IO
= V
CC
or GND;
Switch Off (Figure 4)
5.5 0.2 2.0 4.0
I
on
Maximum On−Channel
Leakage Current,
Channel−to−Channel
V
in
= V
IL
or V
IH
;
Switch−to−Switch =
V
CC
or GND; (Figure 5)
5.5 0.2 2.0 4.0
mA
P1-P3P4-P6P7-P9P10-P12

MC74LVXT8051DTRG

Mfr. #:
Buy MC74LVXT8051DTRG
Manufacturer:
ON Semiconductor
Description:
Multiplexer Switch ICs LOG CMOS MLTIPLXR 8CHAN
Lifecycle:
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