ASAHI KASEI [AK4121]
MS0191-E-03 2004/08
- 9 -
OPERATION OVERVIEW
System Clock
The input port works in slave mode only. The output port works in slave or master mode. An internal system clock is
created by the internal PLL using ILRCK. The MCLK is not needed when the output port is in slave mode, and in slave
mode set the MCLK pin to DVSS. The CMODE2-0 pins select the master/slave and bypass mode. The CMODE2-0
pins should be controlled when pin PDN=“L”.
Mode CMODE2 CMODE1 CMODE0 MCLK Master/Slave (Output Port)
0 L L L 256fso (fso~96kHz) Master
1 L L H 384fso (fso~96kHz) Master
2 L H L 512fso (fso~48kHz) Master
3 L H H 768fso (fso~48kHz) Master
4 H L L Not used. Set to DVSS Slave
5 H L H - (Reserved)
6 H H L - (Reserved)
7 H H H Not used. Set to DVSS Master (BYPASS mode)
Table 1. Master/Slave control
Audio Interface Format
The IDIF2-0 pins select the data mode for the input port. The ODIF1-0 pins select the data mode for the output port. In
all modes the audio data is MSB-first, 2’s compliment format. The SDTO is clocked out on the falling edge of OBICK.
Select these modes when PDN=“L”. When in BYPASS mode, both IBICK and OBICK are fixed to 64fs.
Mode IDIF2 IDIF1 IDIF0 SDTI Format IBICK (Slave)
0 L L L 16bit LSB Justified
t32fs
1 L L H 20bit LSB Justified
t40fs
2 L H L 20bit MSB Justified
t40fs
3 L H H 20/16bit I
2
S Compatible
t40fs or 32fs
4 H L L 24bit LSB Justified
t48fs
Table 2. Input Audio Data Formats
Mode ODIF1 ODIF0 SDTO Format OBICK (Slave) OBICK (Master)
0 L L 16bit LSB Justified 64fs 64fs
1 L H 20bit LSB Justified 64fs 64fs
2 H L 20/16bit MSB Justified
t40fs or 32fs
64fs
3 H H 20/16bit I
2
S Compatible
t40fs or 32fs
64fs
Table 3. Output Audio Data Formats
