©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com
74ABT573 Rev. 1.5.0 7
74ABT573 — Octal D-Type Latch with 3-STATE Outputs
Skew
(11)
SOIC package.
Notes:
11. This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described
switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.)
12. This specification is guaranteed but not tested. The limits represent propagation delays with 250pF load capacitors
in place of the 50pF load capacitors in the standard AC load.
13. Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate
outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW (t
OSHL
), LOW-to-HIGH
(t
OSLH
), or any combination switching LOW-to-HIGH and/or HIGH-to-LOW (t
OST
). This specification is guaranteed
but not tested.
14. This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same
pin. It is measured across all the outputs (drivers) on the same chip, the worst (largest delta) number is the
guaranteed specification. This specification is guaranteed but not tested.
15. Propagation delay variation for a given set of conditions (i.e., temperature and V
CC
) from device to device. This
specification is guaranteed but not tested.
Capacitance
Note:
16. C
OUT
is measured at frequency f = 1MHz per MIL-STD-883B, Method 3012.
Symbol Parameter
T
A
= –40°C to +85°C,
V
CC
= 4.5V to 5.5V,
C
L
= 50pF,
8 Outputs
Switching
(11)
T
A
= –40°C to +85°C,
V
CC
= 4.5V to 5.5V,
C
L
= 250pF,
8 Outputs
Switching
(12)
UnitsMax. Max.
t
OSHL
(13)
Pin to Pin Skew, HL Transitions 1.0 1.5 ns
t
OSLH
(13)
Pin to Pin Skew, LH Transitions 1.0 1.5 ns
t
PS
(14)
Duty Cycle, LH–HL Skew 1.4 3.5 ns
t
OST
(13)
Pin to Pin Skew, LH/HL Transitions 1.5 3.9 ns
t
PV
(15)
Device to Device Skew LH/HL
Transitions
2.0 4.0 ns
Symbol Parameter
Conditions
(T
A
= 25°C) Typ. Units
C
IN
Input Capacitance V
CC
= 0V 5 pF
C
OUT
(16)
Output Capacitance V
CC
= 5.0V 9 pF
©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com
74ABT573 Rev. 1.5.0 8
74ABT573 — Octal D-Type Latch with 3-STATE Outputs
AC Loading
*Includes jig and probe capacitance
Figure 1. Test Load
Figure 2. Test Input Signal Levels
Figure 3. Test Input Signal Requirements
AC Waveforms
Figure 4. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
Figure 5. Propagation Delay, Pulse Width Waveforms
Figure 6. 3-STATE Output HIGH and
LOW Enable and Disable Times
Figure 7. Setup Time, Hold Time and
Recovery Time Waveforms
Amplitude Rep. Rate t
W
t
r
t
f
3.0V 1MHz 500ns 2.5ns 2.5ns
©1993 Fairchild Semiconductor Corporation www.fairchildsemi.com
74ABT573 Rev. 1.5.0 9
74ABT573 — Octal D-Type Latch with 3-STATE Outputs
Physical Dimensions
Figure 8. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www
.fairchildsemi.com/packaging/
0.10 C
C
A
SEE DETAIL A
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-013, VARIATION AC, ISSUE E
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
E) LANDPATTERN STANDARD: SOIC127P1030X265-20L
PIN ONE
INDICATOR
0.25
1 10
BC A
M
20 11
B
X45°
8°
0°
SEATING PLANE
GAGE PLANE
DETAIL A
SCALE: 2:1
SEATING PLANE
LAND PATTERN RECOMMENDATION
F) DRAWING FILENAME: MKT-M20BREV3
0.65
1.27
2.25
9.50
13.00
12.60
11.43
7.60
7.40
10.65
10.00
0.51
0.35
1.27
2.65 MAX
0.30
0.10
0.33
0.20
0.75
0.25
(R0.10)
(R0.10)
1.27
0.40
(1.40)
0.25
D) CONFORMS TO ASME Y14.5M-1994

74ABT573CSJX

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC LATCH OCT D-TYPE 3ST 20SOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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