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74ABT16240ADL,118

P1-P3P4-P6P7-P9P10-P12P13-P15
74ABT16240A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 3 November 2011 3 of 14
NXP Semiconductors
74ABT16240A
16-bit inverting buffer/line driver; 3-state
5. Pinning information
5.1 Pinning
5.2 Pin description
Fig 3. Pin configuration
74ABT16240A
1OE 2OE
1Y0 1A0
1Y1 1A1
GND GND
1Y2 1A2
1Y3 1A3
V
CC
V
CC
2Y0 2A0
2Y1 2A1
GND GND
2Y2 2A2
2Y3 2A3
3Y0 3A0
3Y1 3A1
GND GND
3Y2 3A2
3Y3 3A3
V
CC
V
CC
4Y0 4A0
4Y1 4A1
GND GND
4Y2 4A2
4Y3 4A3
4OE 3OE
001aaj891
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
Table 2. Pin description
Symbol Pin Description
1OE
, 2OE, 3OE, 4OE 1, 48, 25, 24 output enable (LOW active)
1Y
0, 1Y1, 1Y2, 1Y3 2, 3, 5, 6 1 data output
GND 4, 10, 15, 21, 28, 34, 39, 45 ground (0 V)
V
CC
7, 18, 31, 42 supply voltage
2Y
0, 2Y1, 2Y2, 2Y3 8, 9, 11, 12 2 data output
3Y
0, 3Y1, 3Y2, 3Y3 13, 14, 16, 17 3 data output
4Y
0, 4Y1, 4Y2, 4Y3 19, 20, 22, 23 4 data output
4A0, 4A1, 4A2, 4A3 30, 29, 27, 26 4 data input
3A0, 3A1, 3A2, 3A3 36, 35, 33, 32 3 data input
2A0, 2A1, 2A2, 2A3 41, 40, 38, 37 2 data input
1A0, 1A1, 1A2, 1A3 47, 46, 44, 43 1 data input
74ABT16240A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 3 November 2011 4 of 14
NXP Semiconductors
74ABT16240A
16-bit inverting buffer/line driver; 3-state
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability.
8. Recommended operating conditions
Table 3. Function table
[1]
Control Input Output
nOE nAn nYn
LLH
LHL
HXZ
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +7.0 V
V
I
input voltage
[1]
1.2 +7.0 V
V
O
output voltage output in OFF-state or HIGH-state
[1]
0.5 +5.5 V
I
IK
input clamping current V
I
< 0 V 18 - mA
I
OK
output clamping current V
O
< 0 V 50 - mA
I
O
output current output in LOW-state - 128 mA
output in HIGH-state - 64 mA
T
j
junction temperature
[2]
- 150 C
T
stg
storage temperature 65 +150 C
Table 5. Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 4.5 - 5.5 V
V
I
input voltage 0 - V
CC
V
V
IH
HIGH-level input voltage 2.0 - - V
V
IL
LOW-level Input voltage - - 0.8 V
I
OH
HIGH-level output current 32--mA
I
OL
LOW-level output current - - 32 mA
duty cycle 50 %; f
i
1 kHz --64mA
t/V input transition rise and fall rate - - 10 ns/V
T
amb
ambient temperature in free air 40 - +85 C
74ABT16240A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 3 November 2011 5 of 14
NXP Semiconductors
74ABT16240A
16-bit inverting buffer/line driver; 3-state
9. Static characteristics
[1] This parameter is valid for any V
CC
between 0 V and 2.1 V, with a transition time of up to 10 ms. From V
CC
= 2.1 V to V
CC
= 5 V 10 %,
a transition time of up to 100 s is permitted.
[2] Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
[3] This is the increase in supply current for each input at 3.4 V.
[4] This data sheet limit may vary among suppliers.
Table 6. Static characteristics
Symbol Parameter Conditions 25 C 40 C to +85 C Unit
Min Typ Max Min Max
V
IK
input clamping voltage V
CC
= 4.5 V; I
IK
= 18 mA 1.2 0.9 - 1.2 - V
V
OH
HIGH-level output
voltage
V
I
= V
IL
or V
IH
V
CC
= 4.5 V; I
OH
= 3 mA 2.5 2.9 - 2.5 - V
V
CC
= 5.0 V; I
OH
= 3 mA 3.0 3.4 - 3.0 - V
V
CC
= 4.5 V; I
OH
= 32 mA 2.0 2.4 - 2.0 - V
V
OL
LOW-level output
voltage
V
CC
= 4.5 V; I
OL
=64mA;
V
I
=V
IL
or V
IH
- 0.42 0.55 - 0.55 V
I
I
input leakage current V
CC
= 5.5 V; V
I
=V
CC
or GND - 0.01 1.0 - 1.0 A
I
OFF
power-off leakage
current
V
CC
= 0 V; V
I
or V
O
4.5 V - 5.0 100 - 100 A
I
O(pu/pd)
power-up/power-down
output current
V
CC
= 2.0 V; V
O
=0.5V;
V
I
=GNDor V
CC
; nOE =HIGH
[1]
- 5.0 50 - 50 A
I
OZ
OFF-state output
current
V
CC
= 5.5 V; V
I
= V
IL
or V
IH
output HIGH-state at V
O
= 5.5 V - 1.0 10 - 10 A
output LOW-state at V
O
= 0.5 V - 1.0 10 - 10 A
I
LO
output leakage current HIGH-state; V
O
=5.5V;
V
CC
=5.5V; V
I
=GNDor V
CC
-1.050 - 50A
I
O
output current V
CC
= 5.5 V; V
O
= 2.5 V
[2]
180 70 50 180 50 mA
I
CC
supply current V
CC
= 5.5 V; V
I
= GND or V
CC
outputs HIGH-state - 0.5 1.0 - 1.0 mA
outputs LOW-state - 8 19 - 19 mA
outputs 3-state - 0.5 1.0 - 1.0 mA
I
CC
additional supply
current
per input pin; V
CC
= 5.5 V; one input
at 3.4 V and other inputs at V
CC
or
GND
[3][4]
-10200 - 200A
C
I
input capacitance V
I
= 0 V or V
CC
-4- - -pF
C
I/O
input/output
capacitance
outputs disabled; V
O
=0V orV
CC
-6- - -pF
P1-P3P4-P6P7-P9P10-P12P13-P15

74ABT16240ADL,118

Mfr. #:
Buy 74ABT16240ADL,118
Manufacturer:
Nexperia
Description:
Buffers & Line Drivers 16-BIT BUF/DRVR 3-S
Lifecycle:
New from this manufacturer.
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