7
ICS98ULPA877A
1177F—12/10/09
Notes:
1. Switching characteristics guaranteed for application frequency range.
2. Static phase offset shifted by design.
Switching Characteristics
1
Commercial: TA = 0°C - 70°C; Industrial: TA = -40°C - +85°C;
Supply Volta
e AVDDQ, VDDQ = 1.8 V +/- 0.1V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITION (MHz)
MIN TYP MAX UNITS
Output enable time
t
en
OE to any output 4.73 8 ns
Output disable time
t
dis
OE to any output 5.82 8 ns
160 to 270 -40 40
s
271 to 410 -30 30
s
160 to 270 -60 60
s
271 to 410 -50 50
s
In
ut Clock 1 2.5 4 v/ns
Output Enable (OE), (OS) 0.5 v/ns
Output clock slew rate
SLr1
o
1.5 2.5 3 v/ns
t
it
cc+
040ps
t
it
cc-
0-40ps
160 to 270 -50 50
s
271 to 410 -20 20
s
Static Phase Offset
t
SPO
2
271 to 410 -50 0 50 ps
t
jit (per)
+
t
(Ø)dyn +
t
skew(o)
∑
(su)
80 ps
t
Ø
d
n
+
t
skew
o
∑
h
60 ps
160 to 270 40 ps
271 to 410 30
s
SSC modulation fre
uenc
30.00 33 kHz
SSC clock input frequency
deviation
0.00 -0.50 %
PLL Loop bandwidth (-3 dB
from unity gain)
2.0 MHz
160 to 410
Period jitter
t
jit (per)
Input slew rate
SLr1(i)
160 to 410
Cycle-to-cycle period jitter
t
(Ø)dyn
Half-period jitter
t
jit(hper)
Output to Output Skew
t
skew
Dynamic Phase Offset
