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PCA9508D,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
PCA9508_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 28 April 2008 7 of 21
NXP Semiconductors
PCA9508
Hot swappable level translating I
2
C-bus repeater
On the B bus side of the PCA9508, the clock and data lines would have a positive offset
from ground equal to the V
OL
of the PCA9508. After the 8
th
clock pulse, the data line will
be pulled to the V
OL
of the slave device, which is very close to ground in this example. At
the end of the acknowledge, the level rises only to the LOW level set by the driver in the
PCA9508 for a short delay while the A bus side rises above 0.5V
CC(A)
then it continues
HIGH. It is important to note that any arbitration or clock stretching events require that the
LOW level on the B bus side at the input of the PCA9508 (V
IL
) be at or below 0.4 V to be
recognized by the PCA9508 and then transmitted to the A bus side.
Multiple PCA9508 A sides can be connected in a star configuration (Figure 5), allowing all
nodes to communicate with each other.
Multiple PCA9508s can be connected in series (Figure 6) as long as the A side is
connected to the B side. I
2
C-bus slave devices can be connected to any of the bus
segments. The number of devices that can be connected in series is limited by repeater
delay/time-of-flight considerations on the maximum bus speed requirements.
Fig 5. Typical star application
V
CC(B)
V
CC(A)
PCA9508
SDAA SDAB
SCLA SCLB
EN
10 kΩ 10 kΩ
SDA
SCL
BUS
MASTER
SLAVE
400 kHz
SDA
SCL
V
CC(B)
V
CC(A)
10 kΩ 10 kΩ
V
CC(B)
V
CC(A)
PCA9508
SDAA SDAB
SCLA SCLB
EN
10 kΩ
10 kΩ
SLAVE
400 kHz
SDA
SCL
002aac655
V
CC(B)
V
CC(A)
PCA9508
SDAA SDAB
SCLA SCLB
EN
10 kΩ
10 kΩ
SLAVE
400 kHz
SDA
SCL
PCA9508_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 28 April 2008 8 of 21
NXP Semiconductors
PCA9508
Hot swappable level translating I
2
C-bus repeater
Fig 6. Typical series application
002aac656
PCA9508
SDAA SDAB
SCLA SCLB
EN
SDA
SCL
BUS
MASTER
SLAVE
400 kHz
SDA
SCL
10 kΩ 10 kΩ
PCA9508
SDAA SDAB
SCLA SCLB
EN
V
CC
PCA9508
SDAA SDAB
SCLA SCLB
EN
10 kΩ 10 kΩ 10 kΩ 10 kΩ 10 kΩ 10 kΩ
hot-swap
and
offset free
hot-swap
and
offset free
hot-swap
and
offset free
Fig 7. Bus A (0.9 V to 5.5 V bus) waveform
Fig 8. Bus B (2.7 V to 5.5 V) waveform
002aac204
9th clock pulse
acknowledge
SCL
SDA
002aac657
9th clock pulse
acknowledge
SCL
SDA
V
OL
of slave
V
OL
of PCA9508
PCA9508_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 28 April 2008 9 of 21
NXP Semiconductors
PCA9508
Hot swappable level translating I
2
C-bus repeater
8. Limiting values
9. Static characteristics
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
CC(B)
supply voltage port B 2.7 V to 5.5 V −0.5 +7 V
V
CC(A)
supply voltage port A adjustable −0.5 +7 V
V
I/O
voltage on an input/output pin SDAA, SDAB, SCLA, SCLB, EN −0.5 +7 V
I
I
input current any pin - 50 mA
P
tot
total power dissipation - 100 mW
T
stg
storage temperature −55 +125 °C
T
amb
ambient temperature operating in free air −40 +85 °C
T
j
junction temperature - +125 °C
Table 5. Static characteristics
V
CC
=2.7V to 5.5V; GND=0V; T
amb
=
−
40
°
Cto+85
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Supplies
V
CC(B)
supply voltage port B 2.7 - 5.5 V
V
CC(A)
supply voltage port A
[1]
0.9 - 5.5 V
I
CC(A)
supply current port A pin V
CC(A)
--1 mA
I
CCH
HIGH-level supply current both channels HIGH;
V
CC
= 5.5 V;
SDAn = SCLn = V
CC
- 1.5 3 mA
I
CCL
LOW-level supply current both channels LOW;
V
CC
= 5.5 V; one SDA and
one SCL = GND; other SDA
and SCL open
- 1.5 3 mA
I
CC(A)c
contention port A supply current V
CC
= 5.5 V;
SDAn = SCLn = V
CC
- 1.5 3 mA
Input and output SDAB and SCLB
V
IH
HIGH-level input voltage 0.7V
CC(B)
- 5.5 V
V
IL
LOW-level input voltage
[2]
−0.5 - +0.3V
CC(B)
V
V
ILc
contention LOW-level input voltage −0.5 0.4 - V
V
IK
input clamping voltage I
I
= −18 mA - - −1.2 V
I
LI
input leakage current V
I
= 3.6 V - - ±1 µA
I
IL
LOW-level input current SDA, SCL; V
I
= 0.2 V - - 10 µA
V
OL
LOW-level output voltage I
OL
= 100 µA or 6 mA 0.47 0.52 0.6 V
V
OL
−V
ILc
difference between LOW-level
output and LOW-level input voltage
contention
guaranteed by design - - 70 mV
I
LOH
HIGH-level output leakage current V
O
=V
CC
--10µA
C
io
input/output capacitance V
I
= 3 V or 0 V; V
CC
= 3.3 V - 5.2 7 pF
V
I
= 3 V or 0 V; V
CC
= 0 V - 5.2 7 pF
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

PCA9508D,112

Mfr. #:
Buy PCA9508D,112
Manufacturer:
NXP Semiconductors
Description:
Interface - Signal Buffers, Repeaters HOTSWAP LVTTL
Lifecycle:
New from this manufacturer.
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