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LTC4265IDE#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
LTC4265
16
4265fb
For more information www.linear.com/LTC4265
Figure 9. T2PSE Interface Examples
4265 F09
OPTION 1: SERIES CONFIGURATION FOR ACTIVE LOW/LOW IMPEDANCE OUTPUT
–54V
TO
PSE
R
P
TO PD LOAD
GND
LTC4265
V
IN
T2PSE
V
+
OPTION 2: SHUNT CONFIGURATION FOR ACTIVE HIGH/OPEN COLLECTOR OUTPUT
–54V
TO
PSE
R
P
TO PD LOAD
GND
LTC4265
V
IN
T2PSE
V
+
applicaTions inForMaTion
Figure 8. Power Good Interface Examples
GND
R
S
10k
R10
100k
PWRGD
D9
MMBD4148
Q1
FMMT2222
–54V
4265 F08
TO
PSE
LTC4265
ACTIVE-LOW ENABLE
V
IN
V
OUT
V
+
DC/DC
CONV.
GND
R
S
10k
R9
100k
PWRGD
D9
5.1V
MMBZ5231B
–54V
TO
PSE
LTC4265
ACTIVE-LOW ENABLE
V
IN
V
OUT
DC/DC
CONV.
–54V
TO
PSE
ACTIVE-HIGH ENABLE
DC/DC
CONV.
RUN
SHDN
GND
PWRGD
LTC4265
V
IN
V
OUT
Figure 9 shows two interface options using the T2PSE
pin and the opto-isolator. The T2PSE pin is active low and
connects to an opt-isolater to communicate across the DC/
DC converter isolation barrier. The pull up resistor R
P
is
sized according to the requirements of the opto-isolator
operating current, the pull-down capability of the T2PSE
pin, and the choice of V
+
. V
+
for example can come from
the PoE supply rail (which the LTC4265 GND is tied to),
or from the voltage source that supplies power to the DC/
DC converter. Option 1 has the advantage of not drawing
power unless T2PSE is declared active.
T2PSE Interface
When a 2-event Classification sequence successfully
completes, the LTC4265 recognizes this sequence, and
provides an indicator bit, declaring the presence of a
Type-2 PSE. The open drain output provides the option
to use this signal to communicate to the LTC4265 load,
or to leave the pin unconnected.
LTC4265
17
4265fb
For more information www.linear.com/LTC4265
applicaTions inForMaTion
Shutdown Interface
To corrupt the signature resistance, the SHDN pin can be
driven high with respect to V
IN
or connected to GND. If
unused, connect SHDN directly to V
IN
.
Exposed Pad
The LTC4265 uses a thermally enhanced DFN12 package
that includes an Exposed Pad. The exposed pad must be
electrically connected to V
IN
and must connect to a printed
circuit board heat sink.
Auxiliary Power Source
In some applications, it is desirable to power the PD from
an auxiliary power source such as a wall adapter.
Auxiliary power can be injected into an LTC4265-based PD
at the input of the LTC4265, the output of the LTC4265, or
even the output of the DC/DC converter. In addition, some
PD application may desire auxiliary supply dominance or
may be configured for PoE dominance. Furthermore, PD
applications may also opt for a seamless transition —
that is, without power disruption — between PoE and
auxiliary power.
The most common auxiliary power option injects power
between the LTC4265 and the DC/DC converter. Figure 10
presents an example of this application.
In this example, the auxiliary port injects 48V onto the line
via diode D1. The components surrounding the SHDN pin
are selected so that the LTC4265 disconnects power to the
output when the auxiliary supply reaches 36V.
This configuration is an auxiliary-dominant configuration.
That is, the auxiliary power source supplies the power even
if PoE power is already present. This configuration also
provides a seamless transition from PoE to auxiliary power
when auxiliary power is applied, however, the removal of
auxiliary power to PoE power is not seamless.
Contact Linear Technology applications support for detail
information on implementing a custom auxiliary power
supply.
Figure 10. Auxiliary Power Dominant PD Interface
T1
4265 F10
TVS
TO PHY
36V
100k
10k
10k
D1
BR1
+
–
BR2
+
–
0.1µF
100V
C1
GND
LTC4265
V
IN
SHDN
V
OUT
+
–
ISOLATED
WALL
TRANSFORMER
PD
LOAD
RX
–
6
RX
+
3
TX
–
2
TX
+
RJ45
1
7
8
5
4
SPARE
–
SPARE
+
LTC4265
18
4265fb
For more information www.linear.com/LTC4265
applicaTions inForMaTion
IEEE 802.3at SYSTEM POWER-UP REQUIREMENT
Under the IEEE 802.3at standard, a PD must operate under
13.0 Watts as a Type 1 PD until it recognizes a Type-2 PSE.
Initializing PD operation in 13.0-Watt mode eliminates
interoperability issue in case a Type-2 PD is connects to
a Type-1 PSE. Once the PD recognizes a Type-2 PSE, the
IEEE 802.3at standard requires the PD to wait 80ms in
13.0W operation before 25.5W operation can commence.
MAINTAIN POWER SIGNATURE
In an IEEE 802.3af/at system, the PSE uses the maintain
power signature (MPS) to determine if a PD continues to
require power. The MPS requires the PD to periodically
draw at least 10mA and also have an AC impedance less
than 26.25k in parallel with 0.05μF. If one of these condi
-
tions is not met, the PSE may disconnect power to the PD.
LA
YOUT CONSIDERA
TION FOR THE LTC4265
The LTC4265 is relatively immune to layout problems.
Here are some recommendations.
Avoid excessive parasitic capacitance on the R
CLASS
pin
and place resistor R
CLASS
close to the LTC4265.
Connect the LTC4265 exposed pad to a PC board heat
sink. Make the heat sink as large as possible.
Place the input capacitor and transient voltage suppres
-
sor (C14 and D3 in Figure 7) as close to the LTC4265 as
possible.
If using the SHDN pin for auxiliary power application,
separate the SHDN pin from other high voltage connec
-
tions, like GND and V
OUT
, to avoid leakage and capacitive
coupling shutting down the LTC4265.
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LTC4265IDE#TRPBF

Mfr. #:
Buy LTC4265IDE#TRPBF
Manufacturer:
Analog Devices Inc.
Description:
Power Switch ICs - POE / LAN IEEE 802.3 at Hi Pwr PD Int Cntr w/ 2-Ev
Lifecycle:
New from this manufacturer.
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