LTC4265
4
4265fb
For more information www.linear.com/LTC4265
Typical perForMance characTerisTics
Input Current vs Input Voltage
25k Detection Range Input Current vs Input Voltage Input Current vs Input Voltage
GND VOLTAGE (V)
0
0
INPUT CURRENT (mA)
0.1
0.2
0.3
0.4
0.5
2
4 6 8
4265 G01
10
T
A
= 25°C
GND VOLTAGE (V)
(RISING)
0
0
INPUT CURRENT (mA)
10
20
30
40
50
10
20 30 40
4265 G02
50 60
T
A
= 25°C
CLASS 4
CLASS 3
CLASS 2
CLASS 1
CLASS 0
!
GND VOLTAGE (V)
12
9.5
INPUT CURRENT (mA)
10.5
14
16
4265 G03
10.0
18
20 22
11.0
85°C
–40°C
CLASS 1 OPERATION
!
Signature Resistance
vs Input Voltage Class Operation vs Time On Resistance vs Temperature
GND VOLTAGE (V)
1
22
V1:
V2:
SIGNATURE RESISTANCE (kΩ)
23
25
26
27
3
5
4265 G04
24
7
9
6 10
2 4
8
28
RESISTANCE =
DIODES: HD01
T
A
= 25°C
=
V
I
V2 – V1
I
2
– I
1
IEEE UPPER LIMIT
IEEE LOWER LIMIT
LTC4265 ONLY
!
LTC4265 + 2 DIODES
INPUT
VOLTAGE
10V/DIV
CLASS
CURRENT
10mA/DIV
TIME (10µs/DIV)
4265 G05
T
A
= 25°C
!
JUNCTION TEMPERATURE (°C)
–50
0.2
RESISTANCE (Ω)
0.4
0.6
0.8
1.0
–25
0 25 50
4265 G06
75 100
LTC4265
5
4265fb
For more information www.linear.com/LTC4265
Typical perForMance characTerisTics
PWRGD, T2PSE Output Low
Voltage vs Current
Active High PWRGD
Output Low Voltage vs Current Inrush Current vs Input Voltage
CURRENT (mA)
0
PWRGD
V
T2PSE
(V)
0.4
0.6
8
4265 G07
0.2
0
2
4
6
10
T
A
= 25°C
CURRENT (mA)
0
0
PWRGD (V)
0.4
1.0
0.5
1
4265 G08
0.2
0.8
0.6
1.5
2
T
A
= 25°C
GND – V
OUT
= 4V
GND VOLTAGE (V)
40
85
CURRENT (mA)
115
45 50
4265 G09
55 60
90
100
105
110
95
90
100
105
110
95
pin FuncTions
SHDN (Pin 1): Shutdown Input. Use this pin for auxiliary
power application. Drive SHDN high to disable LTC4265
operation and corrupt the signature resistance. If unused,
tie SHDN to V
IN
.
T2PSE (Pin 2): Type-2 PSE Indicator, Open-Drain. Low
impedance indicates the presence of a Type-2 PSE.
R
CLASS
(Pin 3): Class Select Input. Connect a resistor
between R
CLASS
and V
IN
to set the classification load
current. (See Table 2.)
NC (Pin 4, 11): No Connect.
V
IN
(Pins 5, 6): Input Voltage, Negative Rail. Pins 5 and 6
must be electrically tied together at the package.
V
OUT
(Pins 7, 8): Output Voltage Negative Rail. Connects
V
OUT
to V
IN
through an internal power MOSFET. Pins 7
and 8 must be electrically tied together at the package.
PWRGD (Pin 9):
Power Good Output, Open Collector.
High impedance signals power-up completion. PWRGD
is referenced to V
OUT
and features a 14V clamp.
PWRGD (Pin 10): Complementary Power Good Output,
Open-Drain. Low impedance signals power up completion.
PWRGD is referenced to V
IN
.
GND (Pin 12): Input Voltage, Positive Rail. This pin is
connected to the PD positive rail.
Exposed Pad (Pin 13): Tie to V
IN
and PCB heat sink.
LTC4265
6
4265fb
For more information www.linear.com/LTC4265
block DiagraM
4265 BD
BOLD LINE INDICATES
HIGH CURRENT PATH
12
T2PSE
2
R
CLASS
3
NC
4
SHDN
PWRGD
GND
11
NC
1
10
PWRGD
9
V
OUT
8
V
OUT
7
CONTROL
CIRCUITS
CLASSIFICATION
CURRENT LOAD
REF
+
25k 14k
EXPOSED PAD
13
V
IN
6
V
IN
5
EN

LTC4265IDE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Switch ICs - POE / LAN IEEE 802.3 at Hi Pwr PD Int Cntr w/ 2-Ev
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union