1. General description
The 74LVC4245A is an octal dual supply translating transceiver featuring non-inverting
3-state bus compatible outputs in both send and receive directions. It is designed to
interface between a 3 V and 5 V bus in a mixed 3 V and 5 V supply environment.
The device features an output enable input (pin OE
) for easy cascading and a
send/receive input (pin DIR) for direction control. Pin OE
controls the outputs so that the
buses are effectively isolated.
In suspend mode, when V
CC(A)
is zero, there will be no current flow from one supply to the
other supply. The A-outputs must be set 3-state and the voltage on the A-bus must be
smaller than V
diode
(typical 0.7 V).
V
CC(A)
V
CC(B)
, except in suspend mode.
2. Features and benefits
5 V tolerant inputs/outputs, for interfacing with 5 V logic
Wide supply voltage range:
3 V bus (V
CC(B)
): 1.5 V to 3.6 V
5 V bus (V
CC(A)
): 1.5 V to 5.5 V
CMOS low-power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5.5 V
High-impedance when V
CC(A)
= 0 V
Complies with JEDEC standard no. JESD8B/JESD36
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
74LVC4245A
Octal dual supply translating transceiver; 3-state
Rev. 10 — 18 December 2012 Product data sheet