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74LVC4245AD,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
74LVC4245A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 18 December 2012 9 of 18
NXP Semiconductors
74LVC4245A
Octal dual supply translating transceiver; 3-state
V
M
= 1.5 V at 2.7 V V
CC(B)
3.6 V;
V
M
= 0.5 V
CC(A)
at V
CC(A)
4.5 V.
V
OL
and V
OH
are typical output voltage drops that occur with the output load.
Fig 6. Input (An, Bn) to output (Bn, An) propagation delays
mna366
An, Bn
input
Bn, An
output
t
PHL
t
PLH
GND
V
I
V
M
V
M
V
OH
V
OL
V
M
= 1.5 V at 2.7 V V
CC(B)
3.6 V;
V
M
= 0.5 V
CC(A
) at V
CC(A)
4.5 V.
V
X
= V
OL
+ 0.3 V at V
CC(B)
2.7 V;
V
Y
= V
OH
0.3 V at V
CC(B)
2.7 V.
V
OL
and V
OH
are typical output voltage drops that occur with the output load.
Fig 7. 3-state enable and disable times
mna367
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
V
Y
V
X
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
OE input
V
I
V
OL
V
OH
V
CC
V
M
GND
GND
t
PZL
t
PZH
V
M
V
M
74LVC4245A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 18 December 2012 10 of 18
NXP Semiconductors
74LVC4245A
Octal dual supply translating transceiver; 3-state
[1] V
CCI
is the supply voltage associated with the data input port.
[2] V
CCO
is the supply voltage associated with the output port.
Test data is given in Table 8
. Definitions for test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
Fig 8. Load circuitry for switching times
V
EXT
V
CC
V
I
V
O
mna616
DUT
C
L
R
T
R
L
R
L
G
Table 8. Test data
Supply voltage Input Load V
EXT
V
CC(A)
V
CC(B)
V
I
[1]
C
L
R
L
t
PLH
, t
PHL
t
PZH
, t
PHZ
t
PZL
, t
PLZ
[2]
< 2.7 V < 2.7 V V
CCI
50 pF 500 open GND 2 V
CCO
- 2.7 V to 3.6 V 2.7 V 50 pF 500 open GND 2 V
CCO
4.5 V to 5.5 V - 3.0 V 50 pF 500 open GND 2 V
CCO
74LVC4245A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 18 December 2012 11 of 18
NXP Semiconductors
74LVC4245A
Octal dual supply translating transceiver; 3-state
12. Package outline
Fig 9. Package outline SOT137-1 (SO24)
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(1) (1)
eH
E
LL
p
Q
Z
ywv θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
inches
2.65
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
15.6
15.2
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT137-1
X
12
24
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
c
L
v M
A
13
(A )
3
A
y
0.25
075E05 MS-013
pin 1 index
0.1
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.61
0.60
0.30
0.29
0.05
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
e
1
0 5 10 mm
scale
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
99-12-27
03-02-19
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74LVC4245AD,112

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Buy 74LVC4245AD,112
Manufacturer:
Nexperia
Description:
Bus Transceivers XCVR 8BIT LVL SHIFTR
Lifecycle:
New from this manufacturer.
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