AD8625/AD8626/AD8627 Data Sheet
Rev. F | Page 16 of 20
OUTPUT AMPLIFIER FOR DACs
Many system designers use amplifiers as buffers on the output
of amplifiers to increase the DAC’s output driving capability.
The high resolution current output DACs need high precision
amplifiers on their output as current-to-voltage converters
(I/V). Additionally, many DACs operate with a single supply of
5 V. In a single-supply application, selection of a suitable op
amp may be more difficult because the output swing of the
amplifier does not usually include the negative rail, in this case
AGND. This can result in some degradation of the DAC’s
specified performance, unless the application does not use
codes near zero. The selected op amp needs to have very low
offset voltage—for a 14-bit DAC, the DAC LSB is 300 µV with a
5 V reference—to eliminate the need for output offset trims.
Input bias current should also be very low because the bias
current multiplied by the DAC output impedance (about 10 kΩ
in some cases) adds to the zero-code error. Rail-to-rail input and
output performance is desired. For fast settling, the slew rate of
the op amp should not impede the settling time of the DAC.
Output impedance of the DAC is constant and code
independent, but in order to minimize gain errors, the input
impedance of the output amplifier should be as high as possible.
The AD862x, with a very high input impedance, I
B
of 1 pA,
and a fast slew rate, is an ideal amplifier for these types of
applications. A typical configuration with a popular DAC is
shown in Figure 46. In these situations, the amplifier adds
another time constant to the system, increasing the settling time
of the output. The AD862x, with 5 MHz of BW, helps in
achieving a faster effective settling time of the combined DAC
and amplifier.
In applications with full 4-quadrant multiplying capability or a
bipolar output swing, the circuit in Figure 47 can be used. In
this circuit, the first and second amplifiers provide a total gain
of 2, which increases the output voltage span to 20 V. Biasing
the external amplifier with a 10 V offset from the reference
voltage results in a full 4-quadrant multiplying circuit.
03023-045
AD5551/AD5552
AD8627
DGND
*AD5552 ONLY
V
DD
V
REFF
* V
REFS
*
OUT
SCLK
DIN
CS
AGND
5V
2.5V
UNIPOLAR
OUTPUT
LDAC*
0.1
µ
F
10
µ
F
0.1
µ
F
SERIAL
INTERFACE
5V
Figure 46. Unipolar Output
03023-046
ONE CHANNEL
AD5544
1/2
AD8626
DIGITAL INTERFACE CONNECTIONS
OMITTED FOR CLARITY
V
SS
A
GND
F A
GND
X
V
DD
V
REF
X
R
FB
X
ADR01
VREF
10V
1/2
AD8626
–13V
+13V
–10V < V
OUT
< +10V
10k
Ω
5k
Ω
10k
Ω
V
OUT
Figure 47. 4-Quadrant Multiplying Application Circuit
