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IRFTS9342TRPBF

P1-P3P4-P6P7-P8
IRFTS9342PbF
4 www.irf.com
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 8. Maximum Safe Operating Area
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 10. Threshold Voltage vs. Temperature
25 50 75 100 125 150
T
A
, Ambient Temperature (°C)
0
1
2
3
4
5
6
-
I
D
,
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
1E-006 1E-005 0.0001 0.001 0.01 0.1 1 10 100
t
1
, Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
100
T
h
e
r
m
a
l
R
e
s
p
o
n
s
e
(
Z
t
h
J
A
)
°
C
/
W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + T
A
0.01 0.1 1 10 100
V
DS
, Drain-to-Source Voltage (V)
0.01
0.1
1
10
100
1000
I
D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
Tc = 25°C
Tj = 150°C
Single Pulse
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY R
DS
(on)
100μsec
DC
0.4 0.6 0.8 1.0 1.2 1.4
-V
SD
, Source-to-Drain Voltage (V)
0.1
1
10
100
-
I
S
D
,
R
e
v
e
r
s
e
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
T
J
= 25°C
T
J
= 150°C
V
GS
= 0V
-75 -50 -25 0 25 50 75 100 125 150
T
J
, Temperature ( °C )
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
-
V
G
S
(
t
h
)
,
G
a
t
e
t
h
r
e
s
h
o
l
d
V
o
l
t
a
g
e
(
V
)
ID = -25μA
I
D
= -250μA
I
D
= -1.0mA
ID = -10mA
I
D
= -1.0A
IRFTS9342PbF
www.irf.com 5
Fig 12. On-Resistance vs. Gate Voltage
Fig 13. Typical On-Resistance vs. Drain Current
Fig 14. Maximum Avalanche Energy vs. Drain Current Fig 15. Typical Power vs. Time
* Reverse Polarity of D.U.T for P-Channel
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple ≤ 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P. W .
Period
* V
GS
= 5V for Logic Level Devices
*
Inductor Current
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
• di/dt controlled by R
G
• Driver same type as D.U.T.
• I
SD
controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
-
+
+
+
-
-
-
R
G
V
DD
D.U.T *
Fig 16. Diode Reverse Recovery Test Circuit for P-Channel HEXFET
®
Power MOSFETs
2 4 6 8 10 12 14 16 18 20
-V
GS,
Gate -to -Source Voltage (V)
0
20
40
60
80
100
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
m
Ω
)
I
D
= -5.8A
T
J
= 25°C
T
J
= 125°C
0 10 20 30 40 50
-I
D
, Drain Current (A)
20
40
60
80
100
120
140
160
180
200
220
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
m
Ω
)
Vgs = -4.5V
Vgs = -10V
25 50 75 100 125 150
Starting T
J
, Junction Temperature (°C)
0
20
40
60
80
100
120
E
A
S
,
S
i
n
g
l
e
P
u
l
s
e
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
I
D
TOP -0.91A
-1.4A
BOTTOM -4.6A
0.0001 0.001 0.01 0.10 1 10
Time (sec)
0
10
20
30
40
50
60
70
80
90
100
P
o
w
e
r
(
W
)
IRFTS9342PbF
6 www.irf.com
Fig 17a. Gate Charge Test Circuit
Fig 17b. Gate Charge Waveform
Fig 18b. Unclamped Inductive Waveforms
Fig 18a. Unclamped Inductive Test Circuit
Fig 19b. Switching Time Waveforms
Fig 19a. Switching Time Test Circuit
Vds
Vgs
Id
Vgs(th)
Qgs1
Qgs2QgdQgodr
1K
VCC
DUT
0
L
S
20K
S
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
V
DS
V
DD
DRIVER
A
15V
-20V
-V
GS
V
DS
-V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
R
D
V
GS
V
DD
R
G
D.U.T.
+
-
t
p
V
(
BR
)
DSS
I
AS
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
P1-P3P4-P6P7-P8

IRFTS9342TRPBF

Mfr. #:
Buy IRFTS9342TRPBF
Manufacturer:
Infineon Technologies
Description:
MOSFET P-CHANNEL -30V -5.8A 40 mOhm
Lifecycle:
New from this manufacturer.
Delivery:
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