LTC3814-5
19
38145fc
Power Dissipation Considerations
Applications using large MOSFETs and high frequency
of operation may result in a large DRV
CC
/INTV
CC
supply
current. Therefore, when using the linear regulators, it is
necessary to verify that the resulting power dissipation
is within the maximum limits. The DRV
CC
/INTV
CC
supply
current consists of the MOSFET gate current plus the
LTC3814-5 quiescent current:
I
CC
= (f)(Q
G(TOP)
+ Q
G(BOTTOM)
) + 3mA
When using the internal LDO regulator, the power dissipa-
tion is internal so the rise in junction temperature can be
estimated from the equation given in Note 2 of the Electrical
Characteristics as follows:
T
J
= T
A
+ I
EXTVCC
• (V
EXTVCC
– V
INTVCC
)(38°C/W)
and must not exceed 125°C.
Likewise, if the external NMOS regulator is used, the worst
case power dissipation is calculated to be:
P
MOSFET
= (V
DRAIN(MAX)
– 5.5V) • I
CC
and can be used to properly size the device.
FEEDBACK LOOP/COMPENSATION
Introduction
In a typical LTC3814-5 circuit, the feedback loop consists of
two sections: the modulator/output stage and the feedback
amplifi er/compensation network. The modulator/output
stage consists of the current sense component and in-
ternal current comparator, the power MOSFET switches
and drivers, and the output fi lter and load. The transfer
function of the modulator/output stage for a boost con-
verter consists of an output capacitor pole, R
L
C
OUT
, and
an ESR zero, R
ESR
C
OUT
, and also a “right-half plane” zero,
(R
L
/L)(V
IN
2
/V
OUT
2
). It has a gain/phase curve that is typi-
cally like the curve shown in Figure 10 and is expressed
mathematically in the following equation.
H(s)=
V
OUT
(s)
V
ITH
(s)
=
R
L
•V
IN
•V
SENSE(MAX)
2.4 V
OUT
•R
DS(ON)
1+ s•R
ESR
•C
OUT
1+ s•R
L
•C
OUT
•1 s•
L
R
L
V
OUT
2
V
IN
2
s = j2 f
This portion of the power supply is pretty well out of the
users control since the current sense is chosen based on
maximum output load, and the output capacitor is usually
chosen based on load regulation and ripple requirements
without considering AC loop response. The feedback am-
plifi er, on the other hand, gives us a handle on which to
adjust the AC response. The goal is to have an 180° phase
shift at DC so the loop regulates and less than 360° phase
shift at the point where the loop gain falls below 0dB, i.e.,
the crossover frequency, with as much gain as possible
at frequencies below the crossover frequency. Since the
feedback amplifi er adds an additional 90° phase shift to
the phase shift already present from the modulator/output
stage, some phase boost is required at the crossover
frequency to achieve good phase margin. The design
procedure (described in more detail in the next section) is
to (1) obtain a gain/phase plot of modulator/output stage,
(2) choose a crossover frequency and the required phase
boost, and (3) calculate the compensation network.
APPLICATIONS INFORMATION
Figure 10. Bode Plot of Boost Modulator/Output Stage
(1)
FREQUENCY (Hz)
GAIN (dB)
PHASE (DEG)
38145 F10
00
–90
–180
90
180
GAIN
PHASE
LTC3814-5
20
38145fc
The two types of compensation networks, Type 2 and Type
3 are shown in Figures 11 and 12. When component values
are chosen properly, these networks provide a “phase
bump” at the crossover frequency. Type 2 uses a single
pole-zero pair to provide up to about 60° of phase boost
while Type 3 uses two poles and two zeros to provide up
to 150° of phase boost.
The compensation of boost converters are complicated
by two factors: the RHP zero and the dependence of the
loop gain on the duty cycle. The RHP zero adds additional
phase lag and gain. The phase lag degrades phase margin
and the added gain keeps the gain high typically in the
frequency region where the user is trying the roll off the
gain below 0dB. This often forces the user to choose a
crossover frequency at a lower frequency than originally
desired. The duty cycle effect of gain (see above transfer
function) causes the phase margin and crossover frequency
to be dependent on the input supply voltage which may
cause problems if the input voltage varies over a wide range
since the compensation network can only be optimized
for a specifi c crossover frequency. These two factors
usually can be overcome if the crossover frequency is
chosen low enough.
Feedback Component Selection
Selecting the R and C values for a typical Type 2 or
Type 3 loop is a nontrivial task. The applications shown
in this data sheet show typical values, optimized for the
power components shown. They should give acceptable
performance with similar power components, but can be
way off if even one major power component is changed
signifi cantly. Applications that require optimized transient
response will require recalculation of the compensation
values specifi cally for the circuit in question. The underly-
ing mathematics are complex, but the component values
can be calculated in a straightforward manner if we know
the gain and phase of the modulator at the crossover
frequency.
Modulator gain and phase can be obtained in one of
three ways: measured directly from a breadboard, or if
the appropriate parasitic values are known, simulated or
generated from the modulator transfer function. Mea-
surement will give more accurate results, but simulation
or transfer function can often get close enough to give
a working system. To measure the modulator gain and
phase directly, wire up a breadboard with an LTC3814-5
and the actual MOSFETs, inductor and input and output
capacitors that the fi nal design will use. This breadboard
should use appropriate construction techniques for high
speed analog circuitry: bypass capacitors located close
to the LTC3814-5, no long wires connecting components,
appropriately sized ground returns, etc. Wire the feedback
amplifi er with a 0.1µF feedback capacitor from I
TH
to FB
and a 10k to 100k resistor from V
OUT
to FB. Choose the
bias resistor (R
B
) as required to set the desired output
voltage. Disconnect R
B
from ground and connect it to
a signal generator or to the source output of a network
analyzer to inject a test signal into the loop. Measure the
gain and phase from the I
TH
pin to the output node at the
positive terminal of the output capacitor. Make sure the
analyzers input is AC coupled so that the DC voltages
present at both the I
TH
and V
OUT
nodes don’t corrupt the
measurements or damage the analyzer.
APPLICATIONS INFORMATION
Figure 11. Type 2 Schematic and Transfer Function Figure 12. Type 3 Schematic and Transfer Function
GAIN (dB)
38145 F11
0
PHASE
–6dB/OCT
–6dB/OCT
GAIN
PHASE (DEG)
FREQ
–90
–180
–270
–360
R
B
V
REF
R1
R2
FB
C2
IN
OUT
+
C1
GAIN (dB)
38145 F12
0
PHASE
–6dB/OCT
+6dB/OCT –6dB/OCT
GAIN
PHASE (DEG)
FREQ
–90
–180
–270
–360
R
B
V
REF
R1
R2
FB
C2
IN
OUT
+
C1
C3
R3
LTC3814-5
21
38145fc
If breadboard measurement is not practical, mathemat-
ical software such as MATHCAD or MATLAB can be used
to generate plots from the transfer function given in
Equation 1. A SPICE simulation can also be used to gener-
ate approximate gain/phase curves. Plug the expected
capacitor, inductor and MOSFET values into the following
SPICE deck and generate an AC plot of V
OUT
/V
ITH
with gain
in dB and phase in degrees. Refer to your SPICE manual
for details of how to generate this plot.
*This le simulates a simpli ed model of
the 3814-5 for generating a v(out)/(vith) or
a v(out)/v(outin) bode plot
.param vout=24
.param vin=12
.param L=10u
.param cout=270u
.param esr=.018
.param rload=24
*
.param rdson=0.02
.param Vrng=1
.param vsnsmax={0.173*Vrng-0.026}
.param K={vsnsmax/rdson/1.2}
.param wz={1/esr/cout}
.param wp={2/rload/cout}
*
* Feedback Ampli er
rfb1 outin vfb 29k
rfb2 vfb 0 1k
eithx ithx 0 laplace {0.8-v(vfb)} =
{1/(1+s/1000)}
eith ith 0 value={limit(1e6*v(ithx),0,2.4)}
cc1 ith vfb 100p
cc2 ith x1 0.01p
rc x1 vfb 100k
*
* Modulator/Output Stage
eout out 0 laplace {v(ith)} =
{0.5*K*Rload*vin/vout *(1+s/wz)/(1+s/wp)
*(1-s*L/Rload*vout*vout/vin/vin)}
rload out 0 {rload}
*
vstim out outin dc=0 ac=10m; ac stimulus
.ac dec 100 10 10meg
.probe
.end
With the gain/phase plot in hand, a loop crossover fre-
quency can be chosen. Usually the curves look something
like Figure 10. Choose the crossover frequency about 25%
of the switching frequency for maximum bandwidth. Al-
though it may be tempting to go beyond f
SW
/4, remember
that signifi cant phase shift occurs at half the switching
frequency that isn’t modeled in the above H(s) equation
and PSPICE code. Note the gain (GAIN, in dB) and phase
(PHASE, in degrees) at this point. The desired feedback
amplifi er gain will be –GAIN to make the loop gain at 0dB
at this frequency. Now calculate the needed phase boost,
assuming 60° as a target phase margin:
BOOST = – (PHASE + 30°)
If the required BOOST is less than 60°, a Type 2 loop can
be used successfully, saving two external components.
BOOST values greater than 60° usually require Type 3
loops for satisfactory performance.
Finally, choose a convenient resistor value for R1 (10k
is usually a good value). Now calculate the remaining
values:
(K is a constant used in the calculations)
f = chosen crossover frequency
G = 10
(GAIN/20)
(this converts GAIN in dB to G in
absolute gain)
APPLICATIONS INFORMATION

LTC3814IFE-5#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 60V C Mode Sync Boost Cntr
Lifecycle:
New from this manufacturer.
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