Features
Single Voltage Read/Write Operation: 1.65V to 1.95V
Access Time – 80 ns
Sector Erase Architecture
Thirty-one 32K Word (64K Bytes) Sectors with Individual Write Lockout
Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout
Fast Word Program Time – 10 µs
Fast Sector Erase Time – 100 ms
Suspend/Resume Feature for Erase and Program
Supports Reading and Programming from Any Sector by Suspending Erase
of a Different Sector
Supports Reading Any Word in the Non-suspending Sectors by Suspending
Programming of Any Other Word
Low-power Operation
10 mA Active
15 µA Standby
Data Polling, Toggle Bit, Ready/Busy for End of Program Detection
VPP Pin for Write Protection and Accelerated Program Operation
RESET Input for Device Initialization
Sector Lockdown Support
TSOP and CBGA Package Options
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Minimum 100,000 Erase Cycles
Common Flash Interface (CFI)
1. Description
The AT49SV163D(T) is a 1.8-volt 16-megabit Flash memory organized as 1,048,576
words of 16 bits each. The memory is divided into 39 sectors for erase operations.
The device is offered in a 48-lead TSOP and a 48-ball CBGA package. The device
has CE
and OE control signals to avoid any bus contention. This device can be read
or reprogrammed using a single power supply, making it ideally suited for in-system
programming.
The device powers on in the read mode. Command sequences are used to place the
device in other operation modes such as program and erase. The device has the
capability to protect the data in any sector (see Sector Lockdown” on page 6).
To increase the flexibility of the device, it contains an Erase Suspend and Program
Suspend feature. This feature will put the erase or program on hold for any amount of
time and let the user read data from or program data to any of the remaining sectors
within the memory. The end of a program or an erase cycle is detected by the
READY/BUSY
pin, Data Polling or by the toggle bit.
The VPP pin provides data protection. When the V
PP
input is below 0.4V, the program
and erase functions are inhibited. When V
PP
is at 1.65V or above, normal program
and erase operations can be performed. With V
PP
at 10.0V, the program (Dual-word
Program command) operation is accelerated.
16-megabit
(1M x 16)
1.8-volt Only
Flash Memory
AT49SV163D
AT49SV163DT
3656A–FLASH–2/07
2
3656A–FLASH–2/07
AT49SV163D(T)
2.1 TSOP Top View (Type 1)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
WE
RESET
NC
VPP
RDY/BUSY
A18
A17
A7
A6
A5
A4
A3
A2
A1
A16
VCC
GND
I/O15
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
VCC
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
OE
GND
CE
A0
2.2 CBGA Top View (Ball Down)
A
B
C
D
E
F
G
H
1
23456
RDY/BUSY
VPP
A18
NC
I/O2
I/O10
I/O11
I/O3
A3
A4
A2
A1
A0
CE
OE
VSS
A7
A17
A6
A5
I/O0
I/O8
I/O9
I/O1
WE
RST
NC
A19
I/O5
I/O12
VCC
I/O4
A9
A8
A10
A11
I/O7
I/O14
I/O13
I/O6
A13
A12
A14
A15
A16
NC
I/015
VSS
A six-byte command (Enter Single Pulse Program Mode) sequence to remove the requirement
of entering the three-byte program sequence is offered to further improve programming time.
After entering the six-byte code, only single pulses on the write control lines are required for
writing into the device. This mode (Single Pulse Word Program) is exited by powering down
the device, or by pulsing the RESET
pin low for a minimum of 500 ns and then bringing it back
to V
CC
. Erase, Erase Suspend/Resume and Program Suspend/Resume commands will not
work while in this mode; if entered they will result in data being programmed into the device. It
is not recommended that the six-byte code reside in the software of the final product but only
exist in external programming code.
2. Pin Configurations
Pin Name Function
A0 - A19 Addresses
CE
Chip Enable
OE
Output Enable
WE Write Enable
RESET
Reset
RDY/BUSY
READY/BUSY Output
VPP Write Protection
I/O0 - I/O15 Data Inputs/Outputs
NC No Connect
3
3656A–FLASH–2/07
AT49SV163D(T)
3. Block Diagram
4. Device Operation
4.1 Command Sequences
When the device is first powered on, it will be reset to the read or standby mode, depending
upon the state of the control line inputs. In order to perform other device functions, a series of
command sequences are entered into the device. The command sequences are shown in the
“Command Definition Table” on page 12 (I/O8 - I/O15 are don’t care inputs for the command
codes). The command sequences are written by applying a low pulse on the WE
or CE input
with CE
or WE low (respectively) and OE high. The address is latched on the falling edge of
CE
or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE.
Standard microprocessor write timings are used. The address locations used in the command
sequences are not affected by entering the command sequences.
IDENTIFIER
REGISTER
STATUS
REGISTER
DATA
COMPARATOR
OUTPUT
MULTIPLEXER
OUTPUT
BUFFER
INPUT
BUFFER
COMMAND
REGISTER
DATA
REGISTER
Y-GATING
WRITE STATE
MACHINE
PROGRAM/ERASE
VOLTAGE SWITCH
CE
WE
OE
RESET
RDY/BUSY
VCC
GND
Y-DECODER
X-DECODER
INPUT
BUFFER
ADDRESS
LATCH
I/O0 - I/O15
A0 - A19
MAIN
MEMORY
VPP

AT49SV163D-80TU

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
NOR Flash Parallel Flash 1.8V 80NS
Lifecycle:
New from this manufacturer.
Delivery:
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