ADT7461
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13
of the clock signal and remain stable during the
high period, since a low-to-high transition when
the clock is high may be interpreted as a stop
signal. The number of data bytes that can be
transmitted over the serial bus in a single read or
write operation is limited only by what the master
and slave devices can handle.
3. When all data bytes have been read or written,
stop conditions are established. In write mode, the
master pulls the data line high during the tenth
clock pulse to assert a stop condition. In read
mode, the master device overrides the
acknowledge bit by pulling the data line high
during the low period before the ninth clock pulse.
This is known as a no acknowledge. The master
then takes the data line low during the low period
before the tenth clock pulse, then high during the
tenth clock pulse to assert a stop condition.
Any number of bytes of data may be transferred over the
serial bus in one operation, but it is not possible to mix read
and write in one operation because the type of operation is
determined at the beginning and cannot subsequently be
changed without starting a new operation. With the
ADT7461, write operations contain either one or two bytes,
while read operations contain one byte.
To write data to one of the device data registers or to read
data from it, the address pointer register must be set so that
the correct data register is addressed. The first byte of a write
operation always contains a valid address that is stored in the
address pointer register. If data is to be written to the device,
the write operation contains a second data byte that is written
to the register selected by the address pointer register.
This is illustrated in Figure 16. The device address is sent
over the bus followed by R/W
set to 0. This is followed by two
data bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the address pointer
register. The second data byte is the data to be written to the
internal data register. The examples shown in Figure 16 to
Figure 18 use the ADT7461 SMBus Address 0x4C.
Figure 16. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
R/W
SCLK
SDATA
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADT7461
START BY
MASTER
191
ACK. BY
ADT7461
9
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADT7461
STOP BY
MASTER
1
9
SCLK (CONTINUED)
SDATA (CONTINUED)
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
FRAME 3
DATA BYTE
A3A4A5A6
Figure 17. Writing to the Address Pointer Register Only
SCLK
SDATA
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADT7461
START BY
MASTER
19
1
ACK. BY
ADT7461
9
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
R/W
A3A4A5A6
Figure 18. Reading Data from a Previously Selected Register
SCLK
SDATA
D7
D6
D5
D4
D3
D2
D1
D0
NACK. BY
MASTER
START BY
MASTER
9
1
ACK. BY
ADT7461
9
STOP BY
MASTER
A2
A1 A0
1
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE FROM ADT7461
R/W
A3A4A5A6
ADT7461
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14
When reading data from a register there are two
possibilities.
1. If the ADT7461’s address pointer register value is
unknown or not the desired value, it is necessary
to set it to the correct value before data can be read
from the desired data register. This is done by
writing to the ADT7461 as before, but only the
data byte containing the register read address is
sent, since data is not to be written to the register.
This is shown in Figure 17.
A read operation is then performed consisting of
the serial bus address, R/W
bit set to 1, followed
by the data byte read from the data register. This is
shown in Figure 18.
2. If the address pointer register is known to be at the
desired address, data can be read from the
corresponding data register without first writing to
the address pointer register and the bus transaction
shown in Figure 17 can be omitted.
Although it is possible to read a data byte from a data
register without first writing to the address pointer register,
if the address pointer register is already at the correct value,
it is not possible to write data to a register without writing to
the address pointer register because the first data byte of a
write is always written to the address pointer register.
Also, some of the registers have different addresses for read
and write operations. The write address of a register must be
written to the address pointer if data is to be written to that
register, but it may not be possible to read data from that
address. The read address of a register must be written to the
address pointer before data can be read from that register.
ALERT Output
This is applicable when Pin 6 is configured as an ALERT
output. The ALERT output goes low whenever an
out-of-limit measurement is detected, or if the remote
temperature sensor is open circuit. It is an open-drain output
and requires a pullup to V
DD
. Several ALERT outputs can
be wire-ORed together, so the common line goes low if one
or more of the ALERT
outputs goes low.
The ALERT
output can be used as an interrupt signal to a
processor, or it may be used as an SMBALERT
. Slave
devices on the SMBus cannot normally signal to the bus
master that they want to talk, but the SMBALERT
function
allows them to do so.
One or more ALERT
outputs can be connected to a
common SMBALERT
line that is connected to the master.
When the SMBALERT
line is pulled low by one of the
devices, the procedure shown in Figure 19 occurs.
Figure 19. Use of SMBALERT
ALERT RESPONSE
ADDRESS
MASTER SENDS
ARA AND READ
COMMAND
DEVICE SENDS
ITS ADDRESS
RDSTART ACK
DEVICE
ADDRESS
NO
ACK
STOP
MASTER
RECEIVES
SMBALERT
1. SMBALERT is pulled low.
2. Master initiates a read operation and sends the
alert response address (ARA = 0001 100). This is
a general call address that must not be used as a
specific device address.
3. The device whose ALERT
output is low responds
to the alert response address and the master reads
its device address. As the device address is seven
bits, an LSB of 1 is added. The address of the
device is now known and can be interrogated in
the usual way.
4. If the ALERT
output is low on more than one
device, the one with the lowest device address has
priority, in accordance with normal SMBus
arbitration.
5. Once the ADT7461 has responded to the alert
response address, it resets its ALERT
output,
provided the error condition that caused the
ALERT
no longer exists. If the SMBALERT line
remains low, the master sends the ARA again; this
sequence continues until all devices whose
ALERT
out-puts were low have responded.
Low Power Standby Mode
The ADT7461 can be put into low power standby mode
by set-ting Bit 6 of the configuration register. When Bit 6 is
low, the ADT7461 operates normally. When Bit 6 is high,
the ADC is inhibited, and any conversion in progress is
terminated without writing the result to the corresponding
value register.
The SMBus is still enabled. Power consumption in the
standby mode is reduced to less than 10 mA if there is no
SMBus activity or 100 mA if there are clock and data signals
on the bus.
When the device is in standby mode, it is still possible to
initiate a one-shot conversion of both channels by writing to
the one-shot register (Address 0x0F), after which the device
returns to standby. It does not matter what is written to the
one-shot register, as all data written to it is ignored. It is also
possible to write new values to the limit register while in
standby mode. If the values stored in the temperature value
registers are now outside the new limits, an ALERT
is
generated even though the ADT7461 is still in standby.
ADT7461
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15
Sensor Fault Detection
At its D+ input, the ADT7461 contains internal sensor
fault detection circuitry. This circuit can detect situations
where an external remote diode is either not connected or
incorrectly connected to the ADT7461. A simple voltage
comparator trips if the voltage at D+ exceeds V
DD
1V
(typical), signifying an open circuit between D+ and D.
The output of this comparator is checked when a conversion
is initiated. Bit 2 of the status register (open flag) is set if a
fault is detected. If the ALERT
pin is enabled, setting this
flag causes ALERT
to assert low.
If the user does not wish to use an external sensor with the
ADT7461, then to prevent continuous setting of the OPEN
flag, the user should tie the D+ and D inputs together.
The ADT7461 Interrupt System
The ADT7461 has two interrupt outputs, ALERT and
THERM
. Both have different functions and behavior.
ALERT
is maskable and responds to violations of
software-programmed temperature limits or an open-circuit
fault on the external diode. THERM
is intended as a fail-safe
interrupt output that cannot be masked.
If the external or local temperature exceeds the
programmed high temperature limits or equals or exceeds
the low temperature limits, the ALERT
output is asserted
low. An open-circuit fault on the external diode also causes
ALERT
to assert. ALERT is reset when serviced by a master
reading its device address, provided the error condition has
gone away and the status register has been reset.
The THERM output asserts low if the external or local
temperature exceeds the programmed THERM
limits.
THERM
temperature limits should normally be equal to or
greater than the high temperature limits. THERM
is reset
automatically when the temperature falls back within the
THERM
limit. The external limit is set by default to 85°C,
as is the local THERM
limit. A hysteresis value can be
programmed so that THERM
resets when the temperature
falls to the limit value minus the hysteresis value. This
applies to both local and remote measurement channels. The
power-on hysteresis default value is 10°C, but this may be
reprogrammed to any value after powerup.
The hysteresis loop on the THERM
outputs is useful when
THERM
is used for on/off control of a fan. The users
system can be set up so that when THERM
asserts, a fan can
be switched on to cool the system. When THERM
goes high
again, the fan can be switched off. Programming an
hysteresis
value protects from fan jitter where the temperature
hovers around the THERM
limit, and the fan is constantly
being switched.
Table 14. THERM HYSTERESIS
THERM Hysteresis Binary Representation
0°C 0 000 0000
1°C 0 000 0001
10°C 0 000 1010
Figure 20 shows how the THERM and ALERT outputs
operate. A user may choose to use the ALERT
output as an
SMBALERT
to signal to the host via the SMBus that the
temperature has risen. The user could use the THERM
output to turn on a fan to cool the system, if the temperature
continues to increase. This method would ensure there is a
fail-safe mechanism to cool the system without the need for
host intervention.
Figure 20. Operation of the ALERT and THERM
Interrupts
1005C
THERM
LIMIT
905C
805C
705C
605C
505C
405C
THERM
LIMIT HYSTERESIS
HIGH TEMP LIMIT
RESET BY MASTER
TEMPERATURE
1
23
4
ALERT
THERM
1. If the measured temperature exceeds the high
temperature limit, the ALERT
output asserts low.
2. If the temperature continues to increase and
exceeds the THERM
limit, the THERM output
asserts low. This can be used to throttle the CPU
clock or switch on a fan.
3. The THERM
output deasserts (goes high) when
the temperature falls to THERM
limit minus
hysteresis. The default hysteresis value of 10°C is
shown in Figure 20.
4. The ALERT
output deasserts only when the
temperature falls below the high temperature limit,
and the master has read the device address and
cleared the status register.
Pin 6 on the ADT7461 can be configured as either
an ALERT
output or as an additional THERM
output. THERM2 asserts low when the
temperature exceeds the programmed local and/or
remote high temperature limits. It is reset in the
same manner as THERM
, and it is not maskable.
The programmed hysteresis value applies to
THERM2
also.
Figure 21 shows how THERM
and THERM2
might operate together to implement two methods
of cooling the system. In this example, the
THERM2
limits are set lower than the THERM
limits. The THERM2 output could be used to turn
on a fan. If the temperature continues to rise and
exceeds the THERM
limits, the THERM output
could provide additional cooling by throttling the
CPU.

ADT7461ARMZ-REEL7

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
SENSOR DIGITAL -40C-120C MICRO8
Lifecycle:
New from this manufacturer.
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