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ADM1491EBRZ-REEL7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
ADM1490E/ADM1491E Data Sheet
Rev. D | Page 4 of 16
TIMING SPECIFICATIONS
T
A
= −40°C to +85°C.
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Maximum Data Rate 16 Mbps
Propagation Delay t
DPLH
, t
DPHL
11 17 ns R
L
= 54 Ω, C
L
= 100 pF, see Figure 23 and Figure 3
Driver Output Skew t
SKEW
0.5 2 ns R
L
= 54 Ω, C
L
= 100 pF, see Figure 23 and Figure 3,
t
SKEW
= |t
DPLH
− t
DPHL
|
Rise Time/Fall Time
t
DR
, t
DF
8
15
ns
R
L
= 54 Ω, C
L
= 100 pF, see Figure 23 and Figure 3
Enable Time t
ZH
, t
ZL
20 ns R
L
= 110 Ω, C
L
= 50 pF, see Figure 24 and Figure 5
Disable Time t
HZ
, t
LZ
20 ns R
L
= 110 Ω, C
L
= 50 pF, see Figure 24 and Figure 5
RECEIVER
Propagation Delay t
PLH
, t
PHL
12 20 ns C
L
= 15 pF, see Figure 25 and Figure 4
Skew |t
PLH
− t
PHL
| t
SKEW
0.4 2 ns C
L
= 15 pF, see Figure 25 and Figure 4
Enable Time t
ZH
, t
ZL
13 ns R
L
= 1 kΩ, C
L
= 15 pF, see Figure 26 and Figure 6
Disable Time t
HZ
, t
LZ
13 ns R
L
= 1 kΩ, C
L
= 15 pF, see Figure 26 and Figure 6
Timing Diagrams
Switching Characteristics
Z
Y
V
CC
/2 V
CC
/2
t
DPLH
t
DPHL
1/2V
O
V
O
90% POINT
10% POINT 10% POINT
90% POINT
V
DIFF
= V
(Y)
– V
(Z)
t
DR
t
DF
–V
O
V
DIFF
+V
O
0V
V
CC
07430-009
Figure 3. Driver Propagation Delay Rise/Fall Timing
A – B
RO
0V 0V
1.5V 1.5V
V
OH
V
OL
t
PLH
t
PHL
t
SKEW
= |
t
PLH
–
t
PHL
|
07430-010
Figure 4. Receiver Propagation Delay Timing
DE
Y, Z
Y, Z
V
CC
0V
0V
V
OL
V
OH
0.5V
CC
0.5V
CC
t
ZL
t
LZ
t
ZH
t
HZ
V
OL
+ 0.5V
V
OH
– 0.5V
2.3V
2.3V
07430-011
Figure 5. Driver Enable/Disable Timing
OUTPUT LOW
OUTPUT HIGH
1.5V
1.5V
RO
RO
RE
0V
0.7V
CC
0.3V
CC
V
OL
V
OH
0.5V
CC
0.5V
CC
t
ZL
t
LZ
t
ZH
t
HZ
V
OL
+ 0.5V
V
OH
– 0.5V
07430-012
Figure 6. Receiver Enable/Disable Timing
Data Sheet ADM1490E/ADM1491E
Rev. D | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter Rating
V
CC
to GND −0.3 V to +7 V
Digital I/O Voltage (DE,
RE
) −0.3 V to V
CC
+ 0.3 V
Driver Input Voltage (DI) −0.3 V to V
CC
+ 0.3 V
Receiver Output Voltage (RO) −0.3 V to V
CC
+ 0.3 V
Driver Output/Receiver Input Voltage
(A, B, Y, Z)
−9 V to +14 V
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −55°C to +150°C
ESD (HBM) on A, B, Y, and Z ±8 kV
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type θ
JA
Unit
8-Lead SOIC 121 °C/W
14-Lead SOIC
86
°C/W
8-Lead MSOP
133
°C/W
10-Lead MSOP 133 °C/W
ESD CAUTION
ADM1490E/ADM1491E Data Sheet
Rev. D | Page 6 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
07430-034
V
CC
1
RO
2
DI
3
GND
4
A
8
B
7
Z
6
Y
5
ADM1490E
TOP VIEW
(Not to Scale)
Figure 7. 8-Lead MSOP and 8-Lead SOIC
Pin Configuration
07430-013
NOTES
1. NC = NO CONNECT. DO NOT CONNECT
TO THIS PIN.
2. PIN 7 IS NOT CONNECTED INTERNALLY.
SHOWN AS GND TO COMPLY WITH
INDUSTRY STANDARD PINOUT.
3. PIN 14 IS NOT CONNECTED INTERNALLY.
SHOWN AS V
CC
TO COMPLY WITH
INDUSTRY STANDARD PINOUT.
NC
1
RO
2
RE
3
DE
4
V
CC
14
V
CC
13
A
12
B
11
DI
5
Z
10
GND
6
Y
9
GND
7
NC
8
ADM1491E
TOP VIEW
(Not to Scale)
Figure 8. 14-Lead, Narrow Body SOIC
Pin Configuration
RO
1
RE
2
DE
3
DI
4
GND
5
V
CC
10
A
9
B
8
Z
7
Y
6
ADM1491E
TOP VIEW
(Not to Scale)
07430-015
Figure 9. 10-Lead MSOP
Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic Description
8-Lead SOIC,
8-Lead MSOP 14-Lead SOIC 10-Lead MSOP
N/A
1
1 N/A
1
NC No Connect. This pin is available on the 14-lead SOIC only.
2 2 1 RO Receiver Output.
N/A
1
3 2
RE
Receiver Output Enable. A low level enables the receiver output, whereas
a high level places the receiver output in a high impedance state.
N/A
1
4 3 DE Driver Output Enable. A logic high enables the differential driver outputs,
A and B, whereas a logic low places the differential driver outputs in a
high impedance state.
3 5 4 DI Driver Input. When the driver is enabled, a logic low on DI forces Pin A low
and Pin B high, whereas a logic high on DI forces Pin A high and Pin B low.
4 6 5 GND Ground.
N/A
1
7 N/A
1
GND Ground. This pin is available on the 14-lead SOIC only.
N/A
1
8 N/A
1
NC No Connect. This pin is available on the 14-lead SOIC only.
5 9 6 Y Noninverting Driver Output Y.
6 10 7 Z Inverting Driver Output Z.
7 11 8 B Inverting Receiver Input B.
8 12 9 A Noninverting Receiver Input A.
1
13
10
V
CC
Power Supply (5 V ± 5%).
N/A
1
14 N/A
1
V
CC
Power Supply (5 V ± 5%). This pin is available on the 14-lead SOIC only.
1
N/A indicates not applicable.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

ADM1491EBRZ-REEL7

Mfr. #:
Buy ADM1491EBRZ-REEL7
Manufacturer:
Analog Devices Inc.
Description:
RS-422/RS-485 Interface IC 5V 16Mbps ESD Protect Full-Duplex
Lifecycle:
New from this manufacturer.
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