1/11August 2001
■ HIGH SPEED:
t
PD
= 19ns (TYP.) at V
CC
= 4.5V
■ LOW POWER DISSIPATION:
I
CC
= 4µA(MAX.) at T
A
=25°C
■ COMPATIBLE WITH TTL OUTPUTS :
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 6mA (MIN)
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 373
DESCRIPTION
The M74HCT373 is an high speed CMOS OCTAL
LATCH WITH 3-STATE OUTPUTS fabricated
with sub-micron silicon gate C
2
MOS technology.
This 8-BIT D-Type latches is controlled by a latch
enable input (LE) and output enable input (OE
).
While the LE input is held at a high level, the Q
outputs will follow the data input. When the LE is
taken low, the Q outputs will be latched at the logic
level of D input data.
While the OE
input is at low level, the eight outputs
will be in a normal logic state (high or low logic
level) and when OE
is in high level the outputs will
be in a high impedance state.
The 3-State output configuration and the wide
choice of outline make bus organized system
simple.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HCT373
OCTAL D-TYPE LATCH
WITH 3 STATE OUTPUT NON INVERTING
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
DIP M74HCT373B1R
SOP M74HCT373M1R M74HCT373RM13TR
TSSOP M74HCT373TTR
TSSOPDIP SOP
Obsolete Product(s) - Obsolete Product(s)
