NB4N11M
http://onsemi.com
5
Table 5. AC CHARACTERISTICS V
CC
= 3.0 V to 3.6 V, V
EE
= 0 V; (Note 8)
Symbol
Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
V
OUTPP
Output Voltage Amplitude (R
L
= 50 W)
f
in
≤ 1 GHz
(See Figure 12) f
in
≤ 1.5 GHz
f
in
≤ 2.5GHz
550
400
150
660
640
400
550
400
150
660
640
400
550
400
150
660
640
400
mV
V
OUTPP
Output Voltage Amplitude (R
L
= 25 W)
f
in
≤ 1 GHz
(See Figure 12) f
in
≤ 1.5 GHz
f
in
≤ 2.5GHz
280
280
100
370
360
300
280
280
100
370
360
400
280
280
100
370
360
400
mV
f
DATA
Maximum Operating Data Rate 1.5 2.5 1.5 2.5 1.5 2.5 Gb/s
t
PLH
,
t
PHL
Propagation Delay to Output Differential
@ 0.5 GHz
300 420 600 300 420 600 300 420 600 ps
t
SKEW
Duty Cycle Skew (Note 9)
Within Device Skew
Device to Device Skew (Note 13)
2
5
20
20
25
100
2
5
20
20
25
100
2
5
20
20
25
100
ps
t
JITTER
RMS Random Clock Jitter R
L
= 50 W and
R
L
= 25 W (Note 11) f
in
= 750 MHz
f
in
= 1.5 GHz
f
in
= 2.5 GHz
Peak−to−Peak Data Dependent Jitter R
L
= 50 W
f
DATA
= 1.5 Gb/s
(Note 12) f
DATA
= 2.5 Gb/s
Peak−to−Peak Data Dependent Jitter R
L
= 25 W
f
DATA
= 1.5 Gb/s
(Note 12) f
DATA
= 2.5 Gb/s
1
1
1
15
20
5
10
3
3
3
55
85
35
35
1
1
1
15
20
5
10
3
3
3
55
85
35
35
1
1
1
15
20
5
10
3
3
3
55
85
35
35
ps
V
INPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 10)
100 100 100 mV
t
r
t
f
Output Rise/Fall Times @ 0.5 GHz Q, Q
(20% − 80%)
150 300 150 300 150 300 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Measured by forcing V
INPP
(MIN) from a 50% duty cycle clock source. All output loaded with an external R
L
= 50 W and R
L
= 25 W to V
TT
.
Outputs must be connected through R
L
to V
TT
at power up. Input edge rates 150 ps (20% − 80%).
9. Duty cycle skew is measured between differential outputs using the deviations of the sum of T
pw−
and T
pw+
@ 0.5 GHz.
10.V
INPP
(MAX) cannot exceed V
CC
− V
EE
. Input voltage swing is a single−ended measurement operating in differential mode.
11. Additive RMS jitter with 50% duty cycle clock signal.
12.Additive peak−to−peak data dependent jitter with input NRZ data signal (PRBS 2
23
−1).
13.Device to device skew is measured between outputs under identical transition @ 0.5 GHz.
Figure 3. Output Voltage Amplitude (V
OUTPP
) versus Input Clock Frequency (f
IN
) at Ambient Temperature (Typical)
0
100
200
300
400
500
600
700
800
0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3
R
L
= 50 W
R
L
= 25 W
INPUT CLOCK FREQUENCY (GHz)
OUTPUT VOLTAGE AMPLITUDE (mV)
(V
CC
− V
EE
= 3.3 V V
TT
= 3.3 V @ 255C V
in
= 100 mV)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.75 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3
INPUT CLOCK FREQUENCY (GHz)
OUTPUT VOLTAGE AMPLITUDE (mV)
(V
CC
− V
EE
= 3.0 V V
TT
= 1.71 V @255C V
in
= 100 mV)
R
L
= 50 W
R
L
= 25 W
