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MC144110DW

P1-P3P4-P6P7-P9P10-P12
Switching Characteristics
MC144110 Technical Data, Rev. 2
Freescale Semiconductor 7
Figure 5. Serial Input, Positive Clock
Figure 6. Serial Input, Negative Clock
Table 4. Number of Channels vs Clocks Required
Number of Channels
Required
Number of
Clock Cycles
Outputs Used on MC144110 Outputs Used on MC144111
1 6 Q1/R1 Q1/R1
2 12 Q1/R1, Q2/R2 Q1/R1, Q2/R2
3 18 Q1/R1, Q2/R2, Q3/R3 Q1/R1, Q2/R2, Q3/R3
4 24 Q1/R1, Q2/R2, Q3/R3, Q4/R4 Q1/R1, Q2/R2, Q3/R3, Q4/R4
5 30 Q1/R1, Q2/R2, Q3/R3, Q4/R4, Q5/R5 Not Applicable
6 36 Q1/R1, Q2/R2, Q3/R3, Q4/R4, Q5/R5, Q6/R6 Not Applicable
ENB
CLK
D
in
50%
t
su
t
h
t
wL
50%
t
wH
C
1
C
2
C
N
D
1
D
2
D
N
t
su
t
h
ENB
CLK
D
in
t
wL
t
wH
C
1
C
2
C
N
D
1
D
2
D
N
t
h
t
su
t
su
t
h
MC144110 Technical Data, Rev. 2
8 Freescale Semiconductor
Pin Descriptions
4 Pin Descriptions
4.1 INPUTS
D
in
Data Input
Six-bit words are entered serially, MSB first, into digital data input, D
in
. Six words are loaded into the
MC144110 during each D/A cycle; four words are loaded into the MC144111.
The last 6-bit word shifted in determines the output level of pins Q1 Out and R1 Out. The next-to-last 6-bit
word affects pins Q2 Out and R2 Out, etc.
ENB
Negative Logic Enable
The ENB pin must be low (active) during the serial load. On the low-to-high transition of ENB, data
contained in the shift register is loaded into the latch.
CLK
Shift Register Clock
Data is shifted into the register on the high-to-low transition of CLK. CLK is fed into the D-input of a
transparent latch, which is used for inhibiting the clocking of the shift register when ENB is high.
The number of clock cycles required for the MC144110 is usually 36. The MC144111 usually uses 24
cycles. See Table 4 for additional information.
4.2 OUTPUTS
D
out
Data Output
The digital data output is primarily used for cascading the DACs and may be fed into D
in
of the next stage.
R1 Out through Rn Out
Resistor Network Outputs
These are the R-2R resistor network outputs. These outputs may be fed to high-impedance input FET op
amps to bypass the on-chip bipolar transistors. The R value of the resistor network ranges from 7 to 15 kΩ
.
Pin Descriptions
MC144110 Technical Data, Rev. 2
Freescale Semiconductor 9
Q1 Out through Qn Out
NPN Transistor Outputs
Buffered DAC outputs utilize an emitter-follower configuration for current-gain, thereby allowing
interface to low-impedance circuits.
4.3 SUPPLY PINS
V
SS
Negative Supply Voltage
This pin is usually ground.
V
DD
Positive Supply Voltage
The voltage applied to this pin is used to scale the analog output swing from 4.5 to 15 V p-p.
P1-P3P4-P6P7-P9P10-P12

MC144110DW

Mfr. #:
Buy MC144110DW
Manufacturer:
NXP Semiconductors
Description:
IC HEX SERIAL D/A CONV 20-SOIC
Lifecycle:
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