AD600/AD602
Rev. F | Page 23 of 32
2.0
–2.0
0.5
1.0
1.5
–1.5
–1.0
–0.5
GAIN ER
OR (dB)
–0.1
0.1
0
1µ 10µ 101100m10m1m100µ
INPUT SIGNAL (V rms)
00538-047
Figure 49. Gain Error for Figure 41 Without the 2 dB Offset Modification
2.0
–2.0
0.5
1.0
1.5
–1.5
–1.0
–0.5
GAIN ER
OR (dB)
–0.1
0.1
0
1µ 10µ 101100m10m1m100µ
INPUT SIGNAL (V rms)
00538-048
Figure 50. Adding the 2 dB Offsets Improves the Linearization
The maximum gain of this circuit is 120 dB. If no filtering were
used, the noise spectral density of the AD600 (1.4 nV/√Hz)
would amount to an input noise of 8.28 μV rms in the full
bandwidth (35 MHz). At a gain of one million, the output noise
would dominate. Consequently, some reduction of bandwidth is
mandatory and, in the circuit of Figure 47, it is due mostly to a
single-pole, low-pass filter R5/C3 that provides a −3 dB
frequency of 458 kHz, which reduces the worst-case output
noise (at V
AGC
) to about 100 mV rms at a gain of 100 dB. Of
course, the bandwidth (and therefore the output noise) could be
further reduced, for example, in audio applications, merely by
increasing C3. The value chosen for this application is optimal
in minimizing the error in the V
LOG
output for small input signals.
The AD600 is dc-coupled, but even miniscule offset voltages at
the input would overload the output at high gains; thus, high-
pass filtering is also needed. To provide operation at low
frequencies, two simple 0s at about 12 Hz are provided by
R1/C1 and R4/C2; the U3A and U3B (AD713) op amp sections
are used to provide impedance buffering because the input
resistance of the AD600 is only 100 Ω. A further 0 at 12 Hz is
provided by C4 and the 6.7 kΩ input resistance of the AD636
rms converter.
The rms value of V
LOG
is generated at Pin 8 of the AD636; the
averaging time for this process is determined by C5, and the
value shown results in less than 1% rms error at 20 Hz. The
slowly varying V rms is compared with a fixed reference of
316 mV, derived from the positive supply by R10/R11. Any
difference between these two voltages is integrated in C6, in
conjunction with the U3C op amp, the output of which is V
LOG
.
A fraction of this voltage, determined by R12 and R13, is
returned to the gain control inputs of all AD600 sections.
An increase in V
LOG
lowers the gain because this voltage is
connected to the inverting polarity control inputs.
In this case, the gains of all three VCA sections are varied
simultaneously, so the scaling is not 32 dB/V but 96 dB/V or
10.42 mV/dB. The fraction of V
LOG
required to set its scaling to
50 mV/dB is therefore 10.42/50 or 0.208. The resulting full-
scale range of V
LOG
is nominally ±2.5 V. This scaling allows the
circuit to operate from ±5 V supplies.
Optionally, the scaling can be altered to 100 mV/dB, which
would be more easily interpreted when V
LOG
is displayed on a
DVM by increasing R12 to 25.5 kΩ. The full-scale output of
±5 V then requires the use of supply voltages of at least ±7.5 V.
A simple attenuator of 16.6 ± 1.25 dB is formed by R2/R3
and the 100 Ω input resistance of the AD600. This allows the
reference level of the decibel output to be precisely set to 0 for
an input of 3.16 mV rms and thus center the 100 dB range
between 10 μV and 1 V. In many applications, R2/R3 can be
replaced by a fixed resistor of 590 Ω. For example, in AGC
applications, neither the slope nor the intercept of the
logarithmic output is important.
A few additional components (R14 to R16 and Q1) improve the
accuracy of V
LOG
at the top end of the signal range (that is, for
small gains). The gain starts rolling off when the input to the
first amplifier, U1A, reaches 0 dB. To compensate for this non-
linearity, Q1 turns on at V
LOG
~ 1.5 V and increases the feedback
to the control inputs of the AD600s, thereby needing a smaller
voltage at V
LOG
to maintain the input to the AD636 to the
setpoint of 316 mV rms.
120 dB RMS/AGC SYSTEM WITH OPTIMAL SNR
(SEQUENTIAL GAIN)
In the last case, all gains are adjusted simultaneously, resulting
in an output SNR that is always less than optimal. The use of
sequential gain control results in a major improvement in SNR,
with only a slight penalty in the accuracy of V
LOG
and no
penalty in the stabilization accuracy of V
AGC
. The idea is to
increase the gain of the earlier stages first (as the signal level
decreases) and maintain the highest SNR throughout the
amplifier chain. This can be easily achieved with the AD600
because its gain is accurate even when the control input is
overdriven. That is, each gain control window of 1.25 V is
used fully before moving to the next amplifier to the right.
