NCV8851
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16
Equations for placement of pole, zero and crossover frequency follow:
Currentloop Compensator Voltageloop Compensator
w
iz
+
1
L @ C
Ǹ
w
vz
+
2
L @ C
Ǹ
w
ip
+
F
SW
@ p
4
w
vp
+
F
SW
@ p
4
w
i
+ 2 @ w
ip
w
v
+ 2 @ w
vp
The implementation of the above compensators is through
a resistance on the negative input (R
C2
, R
F1
), resistor (R
C1
,
R
V1
) and capacitor (C
C1
, C
V1
) in series in feedback and
another capacitor (C
C2
, C
V2
) in feedback of an opamp. The
feedback capacitors (C
C1
, C
V1
) in series with feedback
resistor are chosen, on the order of less than 3 nF. The values
are calculated as follows:
Currentloop Compensator Voltageloop Compensator
R
C1
+
1
w
iz
@ C
C1
R
V1
+
1
w
vz
@ C
V1
C
CE
+
1
w
ip
@ R
C1
C
VE
+
1
w
vp
@ R
V1
C
C2
+
C
C1
C
C1
C
CE
* 1
C
V2
+
C
V1
C
V1
C
VE
* 1
R
C2
+
1
w
i
@ (C
C1
) C
C2
)
R
F1
+
1
w
v
@ (C
V1
) C
V2
)
The resistor divider on the negative input of the VEA also
sets the output voltage. This resistor divider is composed of
a resistor from the output voltage to the negative input of the
VEA (R
F1
) and a resistor from the negative input of the VEA
to ground (R
F0
). The bottom resistor value is calculated as
follows:
R
F0
+
R1 V
REF
V
OUT
* V
REF
Thermal Considerations
The power dissipation of the NCV8851 varies with the
MOSFETs used, V
IN
and the boost voltage (V
BST
). The
average MOSFET gate current typically dominates the
control IC power dissipation. The IC power dissipation can
be estimated as follows:
P
IC
+ V
IN
@ I
Q
) P
HS
) P
L
Where: P
IC
: control IC power dissipation
I
Q
: IC measured supply current (quiescent current)
P
TG
: highside MOSFET gate driver losses
P
BG
: lowside MOSFET gate driver losses
The highside switching MOSFET gate driver losses are:
P
TG
+ Q
TG
@ F
SW
@ V
BST
Where: Q
TG
: total highside MOSFET gate charge at V
BST
V
BST
: BST pin voltage
The lowside synchronous rectifier MOSFET gate driver
losses are:
P
BG
+ Q
BG
@ F
SW
@ V
CC
Where: Q
BG
: total lowside MOSFET gate charge at V
IN
The junction temperature of the controller can then be
calculated as follows:
T
J
+ T
A
) P
IC
@ R
qJA
Where: T
J
= junction temperature of the IC
T
A
= ambient temperature
R
q
JA
= junctiontoambient thermal resistance of
the IC package
The package thermal resistance (R
q
JA
) can be obtained
from the specifications section of this data sheet and a
calculation can be made to determine the IC junction
temperature. It should be noted that the physical layout of
the board, the proximity of other heat sources such as
MOSFETs and inductors and the amount of metal connected
to the IC impact the temperature of the device. Use these
calculations as a guide, but measurements should be taken
in the actual application.
NCV8851
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17
PACKAGE DIMENSIONS
TSSOP20
CASE 948E02
ISSUE C
DIM
A
MIN MAX MIN MAX
INCHES
6.60 0.260
MILLIMETERS
B 4.30 4.50 0.169 0.177
C 1.20 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.27 0.37 0.011 0.015
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8
____
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE W.
110
1120
PIN 1
IDENT
A
B
T
0.100 (0.004)
C
D
G
H
SECTION NN
K
K1
JJ1
N
N
M
F
W
SEATING
PLANE
V
U
S
U
M
0.10 (0.004) V
S
T
20X REFK
L
L/2
2X
S
U0.15 (0.006) T
DETAIL E
0.25 (0.010)
DETAIL E
6.40 0.252
--- ---
S
U0.15 (0.006) T
7.06
16X
0.36
16X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NCV8851/D
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NCV8851DBG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Controllers AUTOMTVE GRD SYNCHRN
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New from this manufacturer.
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