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MC74HCT366ADTG

P1-P3P4-P6P7-P7
MC74HCT366A
http://onsemi.com
4
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol Unit
Guaranteed Limit
V
CC
V
Test ConditionsParameter
Symbol Unit
v 125_Cv 85_C
– 55 to
25_C
V
CC
V
Test ConditionsParameter
I
OZ
Maximum Three−State
Leakage Current
Output in High−Impedance State
V
in
= V
IL
or V
IH
V
out
= V
CC
or GND
6.0 ± 0.5 ± 5.0 ± 10 μA
I
CC
Maximum Quiescent Supply
Current (per Package)
V
in
= V
CC
or GND
I
out
= 0 μA
6.0 4 40 160 μA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Symbol
Parameter
V
CC
V
Guaranteed Limit
Unit
– 55 to
25_C
v 85_C v 125_C
t
PLH
,
t
PHL
Maximum Propagation Delay, Input A to Output Y
(Figures 1 and 3)
2.0
3.0
4.5
6.0
120
60
24
20
150
75
30
26
180
90
36
31
ns
t
PLZ
,
t
PHZ
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
2.0
3.0
4.5
6.0
220
110
44
37
275
140
55
47
330
170
66
56
ns
t
PZL
,
t
PZH
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
2.0
3.0
4.5
6.0
220
110
44
37
275
140
55
47
330
170
66
56
ns
t
TLH
,
t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 3)
2.0
3.0
4.5
6.0
60
22
12
10
75
28
15
13
90
34
18
15
ns
C
in
Maximum Input Capacitance — 10 10 10 pF
C
out
Maximum Three−State Output Capacitance
(Output in High−Impedance State)
— 15 15 15 pF
C
PD
Power Dissipation Capacitance (Per Buffer)*
Typical @ 25°C, V
CC
= 5.0 V
pF
60
* Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC
2
f + I
CC
V
CC
.
MC74HCT366A
http://onsemi.com
5
SWITCHING WAVEFORMS
(V
I
= 0 to 3 V, V
M
= 1.3 V)
V
CC
GND
t
f
t
r
INPUT A
(V
I
)
OUTPUT Y
10%
V
M
90%
10%
50%
90%
t
TLH
t
PLH
t
PHL
t
THL
OUTPUT ENABLE
(V
I
)
OUTPUT Y
OUTPUT Y
V
M
50%
50%
90%
10%
t
PZL
t
PLZ
t
PZH
t
PHZ
V
CC
GND
HIGH
IMPEDANCE
V
OL
V
OH
HIGH
IMPEDANCE
Figure 1. Figure 2.
TEST CIRCUITS
*Includes all probe and jig capacitance
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
*Includes all probe and jig capacitance
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
CONNECT TO V
CC
WHEN
TESTING t
PLZ
AND t
PZL
.
CONNECT TO GND WHEN
TESTING t
PHZ
AND t
PZH
.
1 kΩ
Figure 3. Figure 4.
INPUT A
OUTPUT ENABLE 1
OUTPUT ENABLE 2
V
CC
TO OTHER
FIVE BUFFERS
Y
LOGIC DETAIL
ONE OF 6
BUFFERS
MC74HCT366A
http://onsemi.com
6
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
CASE 948F
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
____
SECTION N−N
SEATING
PLANE
IDENT.
PIN 1
1
8
16
9
DETAIL E
J
J1
B
C
D
A
K
K1
H
G
DETAIL E
F
M
L
2X L/2
−U−
S
U0.15 (0.006) T
S
U0.15 (0.006) T
S
U
M
0.10 (0.004) V
S
T
0.10 (0.004)
−T−
−V−
−W−
0.25 (0.010)
16X REFK
N
N
7.06
16X
0.36
16X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
P1-P3P4-P6P7-P7

MC74HCT366ADTG

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Buy MC74HCT366ADTG
Manufacturer:
ON Semiconductor
Description:
Buffers & Line Drivers IC BUFF DVR TRI-ST HEX
Lifecycle:
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