MC34151, MC33151
http://onsemi.com
6
Figure 14. Drive Output Rise and Fall Time
versus Load Capacitance
Figure 15. Supply Current versus Drive Output
Load Capacitance
Figure 16. Supply Current versus Input Frequency Figure 17. Supply Current versus Supply Voltage
C
L
, OUTPUT LOAD CAPACITANCE (nF)
-t , OUTPUT RISE‐FALL TIME(ns)
t
f
t
r
t
r
V
CC
= 12 V
V
IN
= 0 V to 5.0 V
T
A
= 25°C
C
L
, OUTPUT LOAD CAPACITANCE (nF)
I
CC
, SUPPLY CURRENT (mA)
V
CC
= 12 V
Both Logic Inputs Driven
0 V to 5.0 V
50% Duty Cycle
Both Drive Outputs Loaded
T
A
= 25°C
f = 500 kHz
f = 200 kHz
f = 50 kHz
I
CC
, SUPPLY CURRENT (mA)
1
2
3
4
Both Logic Inputs Driven
0 V to 5.0 V,
50% Duty Cycle
Both Drive Outputs Loaded
T
A
= 25°C
1 - V
CC
= 18 V, C
L
= 2.5 nF
2 - V
CC
= 12 V, C
L
= 2.5 nF
3 - V
CC
= 18 V, C
L
= 1.0 nF
4 - V
CC
= 12 V, C
L
= 1.0 nF
f, INPUT FREQUENCY (Hz)
I
CC
, SUPPLY CURRENT (mA)
V
CC
, SUPPLY VOLTAGE (V)
T
A
= 25°C
Logic Inputs at V
CC
Low State Drive Outputs
Logic Inputs Grounded
High State Drive Outputs
f
80
60
40
20
0
80
60
40
20
0
80
60
40
20
0
8.0
6.0
4.0
2.0
0
0.1 1.0 10 0.1 1.0 10
100 1.0 M
0 4.0 8.0 12 16
10 k
APPLICATIONS INFORMATION
Description
The MC34151 is a dual inverting high speed driver
specifically designed to interface low current digital
circuitry with power MOSFETs. This device is constructed
with Schottky clamped Bipolar Analog technology which
offers a high degree of performance and ruggedness in
hostile industrial environments.
Input Stage
The Logic Inputs have 170 mV of hysteresis with the input
threshold centered at 1.67 V. The input thresholds are
insensitive to V
CC
making this device directly compatible
with CMOS and LSTTL logic families over its entire
operating voltage range. Input hysteresis provides fast
output switching that is independent of the input signal
transition time, preventing output oscillations as the input
thresholds are crossed. The inputs are designed to accept a
signal amplitude ranging from ground to V
CC
. This allows
the output of one channel to directly drive the input of a
second channel for master−slave operation. Each input has
a 30 kW pulldown resistor so that an unconnected open input
will cause the associated Drive Output to be in a known high
state.
Output Stage
Each totem pole Drive Output is capable of sourcing and
sinking up to 1.5 A with a typical ‘on’ resistance of 2.4 W at
1.0 A. The low ‘on’ resistance allows high output currents
to be attained at a lower V
CC
than with comparative CMOS
drivers. Each output has a 100 kW pulldown resistor to keep
the MOSFET gate low when V
CC
is less than 1.4 V. No over
current or thermal protection has been designed into the
device, so output shorting to V
CC
or ground must be
avoided.
Parasitic inductance in series with the load will cause the
driver outputs to ring above V
CC
during the turn−on
transition, and below ground during the turn−off transition.
With CMOS drivers, this mode of operation can cause a
destructive output latchup condition. The MC34151 is
immune to output latchup. The Drive Outputs contain an
internal diode to V
CC
for clamping positive voltage
transients. When operating with V
CC
at 18 V, proper power
supply bypassing must be observed to prevent the output
ringing from exceeding the maximum 20 V device rating.
Negative output transients are clamped by the internal NPN
pullup transistor. Since full supply voltage is applied across
