830584AGILFT

Low Skew, PCI-X 1-to-4 Fanout Buffer
830584I
Datasheet
©2015 Integrated Device Technology, Inc December 16, 20151
GENERAL DESCRIPTION
The 830584I is a low skew, general purpose PCI-X 1-to-4 Fanout
Buffer and a member of the family of High Performance Clock Solutions
from IDT. Guaranteed output and part-to-part skew characteristics
make the 830584I ideal for those clock distribution applications
demanding well defi ned performance and repeatablility. The 830584I
is designed and characterized from -40°C to 85°C for industrial
applications and is packaged in an 8 TSSOP package.
BLOCK DIAGRAM PIN ASSIGNMENT
FEATURES
• General purpose and PCI-X 1:4 clock buffer
• Four single-ended LVCMOS/LVTTL clock outputs
• One single-ended LVCMOS/LVTTL clock input
• Maximum output frequency: 140MHz
• Output enable control (outputs disabled in logic low state)
• Output skew: 100ps (maximum)
• Part-to-part skew: 400ps (maximum)
Additive phase jitter, RMS: 0.15ps (typical)
• Space-saving 8 lead TSSOP package
• Full 3.3V operating supply mode
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) packages
CLKIN
OE
Q0
Q1
Q2
Q3
830584I
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm
package body
G Package
Top View
1
2
3
4
8
7
6
5
CLKIN
OE
Q0
GND
Q3
Q2
V
DD
Q1
830584I Datasheet
©2015 Integrated Device Technology, Inc December 16, 20152
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
TABLE 3. FUNCTION TABLE
Number Name Type Description
1 CLKIN Input
Single-ended clock input reference signal.
LVCMOS/LVTTL interface levels.
2 OE Input
Output enable control input pin. See Table 3, Function Table.
LVCMOS / LVTTL interface levels.
3, 5, 7. 8 Q0, Q1, Q2, Q3 Output Single-ended clock outputs. LVCMOS/LVTTL interface levels.
4 GND Power Power supply ground.
6V
DD
Power Positive supply pin.
Symbol Parameter Test Conditions Minimum Typical Maximum
Units
C
IN
Input Capacitance 4 pF
R
OUT
Output Impedance 15
Ω
Inputs Outputs
OE CLKIN Q0:Q3
000
010
100
111
830584I Datasheet
©2015 Integrated Device Technology, Inc December 16, 20153
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5 V
Outputs, V
O
-0.5V to V
DD
+ 0.5V
Package Thermal Impedance, θ
JA
121.5°C/W (0 mps)
Storage Temperature, T
STG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifi cations only. Functional
operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
TABLE 4A. RECOMMENDED OPERATING CONDITIONS, V
DD
= 3.3V ± 0.3V, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Positive Supply Voltage 3.0 3.3 3.6 V
V
IH
High Level Input Voltage 0.7*V
DD
V
V
IL
Low Level Input Voltage 0.3*V
DD
V
V
I
Input Voltage 0 V
DD
V
I
OH
High-Level Output Current -24 mA
I
OL
Low-Level Output Current 24 mA
T
A
Operating Free-Air Temperature -40 85 °C
TABLE 4B. DC CHARACTERISTICS, V
DD
= 3.3V ± 0.3V, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions Minimum Typical† Maximum Units
V
IK
Input Voltage I
I
= -18mA –1.2 V
V
OH
Output High Voltage
I
OH
= -1mA V
DD
– 0.2 V
I
OH
= -24mA 2 V
I
OH
= -12mA 2.4 V
V
OL
Output Low Voltage
I
OL
= 1mA 0.2 V
I
OL
= 24mA 0.8 V
I
OL
= 12mA 0.55 V
I
OH
Output High Current
V
O
= 1V –50 mA
V
O
= 1.65V –55 mA
I
OL
Output Low Current
V
O
= 2V 60 mA
V
O
= 1.65V 70 mA
I
I
Input Current V
I
= 0V or V
DD
±150 µA
I
DD
Dynamic Current f = 67MHz 37 mA
C
i
Input Capacitance V
I
= 0V or V
DD
3pF
C
o
Output Capacitance V
I
= 0V or V
DD
3.2 pF
All typical values are at respective nominal V
DD
and 25°C.

830584AGILFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer LVCMOS 4 OUT FANOUT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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