TJA1043 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2017. All rights reserved.
Product data sheet Rev. 6 — 10 November 2017 9 of 32
NXP Semiconductors
TJA1043
High-speed CAN transceiver
[1] Pin ERR_N is an active-LOW output, so a LOW-level indicates a set flag and a HIGH-level indicates a
cleared flag. Allow pin ERR_N to stabilize for at least 8 s after changing operating modes.
[2] Allow for a TXD dominant time of at least 4 s per dominant-recessive cycle.
7.2.1 UV
NOM
flag
UV
NOM
is the V
CC
and V
IO
undervoltage detection flag. The flag is set when the voltage on
pin V
CC
drops below the V
CC
undervoltage detection voltage, V
uvd(VCC)
, for longer than the
undervoltage detection time, t
det(uv)
, or when the voltage on pin V
IO
drops below V
uvd(VIO)
for longer than t
det(uv)
. When the UV
NOM
flag is set, the transceiver enters Sleep mode to
save power and to ensure the bus is not disturbed. In Sleep mode the voltage regulators
connected to pin INH are disabled, avoiding any extra power consumption that might be
generated as a result of a short-circuit condition.
Any wake-up request, setting the Pwon flag or a LOW-to-HIGH transition on STB_N will
clear UV
NOM
and the timers, allowing the voltage regulators to be reactivated (at least until
UV
NOM
is set again). UV
NOM
will also be cleared if both V
CC
and V
IO
recover for longer
than the undervoltage recovery time, t
rec(uv)
. The transceiver will then switch to the
operating mode indicated by the logic levels on pins STB_N and EN (see Table 4
).
7.2.2 UV
BAT
flag
UV
BAT
is the V
BAT
undervoltage detection flag. This flag is set when the voltage on
pin V
BAT
drops below V
uvd(VBAT)
. When UV
BAT
is set, the transceiver will try to enter
Standby mode to save power and will disengage from the bus (zero load). UV
BAT
is
cleared when the voltage on pin V
BAT
recovers. The transceiver will then switch to the
operating mode indicated by the logic levels on pins STB_N and EN (see Table 4
).
7.2.3 Pwon flag
Pwon is the V
BAT
power-on flag. This flag is set when the voltage on pin V
BAT
recovers
after previously dropping below V
uvd(VBAT)
(usually because the battery was
disconnected). Setting the Pwon flag clears the UV
NOM
flag and timers. The Wake and
Wake-up source flags are set to ensure consistent system power-up under all supply
conditions. In Listen-only mode the Pwon flag can be polled via pin ERR_N (see Table 5
).
The flag is cleared when the transceiver enters Normal mode.
7.2.4 Wake flag
The Wake flag is set when the transceiver detects a local or remote wake-up request. A
local wake-up request is detected when the logic level on pin WAKE changes, and the
new level remains stable for at least t
wake
. The Wake flag can be set in Standby mode,
Go-to-Sleep mode or Sleep mode. Setting the Wake flag clears the UV
NOM
flag and
Wake-up
source
in Normal mode (before the fourth
dominant-to-recessive edge on pin TXD
[2]
)
on leaving Normal mode
Bus failure in Normal mode (after the fourth
dominant-to-recessive edge on pin TXD
[2]
)
on re-entering Normal mode or by
setting the Pwon flag
Local failure in Listen-only mode (coming from Normal
mode)
on entering Normal mode or when RXD
is dominant while TXD is recessive
(provided that all local failures are
resolved) or by setting the Pwon flag
Table 5. Accessing internal flags via pin ERR_N
…continued
Internal
flag
Flag is available on pin ERR_N
[1]
Flag is cleared
