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CPC7593ZA

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
I
NTEGRATED
C
IRCUITS
D
IVISION
10 www.ixysic.com R05
CPC7593
1.6.6 Ringing Test Switch, SW8
Parameter Test Conditions Symbol Minimum Typical Maximum Unit
Off-State
Leakage current
V
SW8
(differential) = R
TESTin
to
R
RINGING
All-Off state.
+25° C,
V
SW
(differential) = -60 V to +175 V
I
SW
-
0.05
1 A
+85° C,
V
SW
(differential) = -60 V to +175 V
0.1
-40° C,
V
SW
(differential) = -60 V to +175 V
0.05
On Resistance
I
SW(ON)
= ±70 mA, ±80 mA R
ON
-35-
On Voltage
I
SW(ON)
= ±1 mA V
ON
-0.751.5V
Steady-State Current* Inputs set for ringing test mode.
I
SW
--100mA
Surge Current* Inputs set for ringing test mode.
I
SW
--1A
Release Current SW4 transition from on to off.
I
SW
-450- A
Logic input to switch
output isolation
Logic inputs = GND
+25°C, V
SW
(R
RINGING
, R
TESTin
)=±320V
I
SW
-
0.1
1 A
+85°C, V
SW
(R
RINGING
, R
TESTin
)=±330V
0.3
-40°C, V
SW
(R
RINGING
, R
TESTin
)=±310V
0.1
dV/dt sensitivity
100V
PP
Square Wave, 100Hz
(Not production tested - limits are
guaranteed by design and quality
control sampling audits.)
-500-V/s
*Protection and current limiting must prevent exceeding this parameter.
I
NTEGRATED
C
IRCUITS
D
IVISION
CPC7593
R05 www.ixysic.com 11
1.6.7 TESTin Switches, SW9 and SW10
Parameter Test Conditions Symbol Minimum Typical Maximum Unit
Off-state leakage current
V
SW9
(differential) = T
TESTin
to T
BAT
V
SW10
(differential) = R
TESTin
to R
BAT
All-Off state.
+25° C,
V
SW
(differential) = -320 V to gnd
V
SW
(differential) = +260 V to -60 V
I
SW
-
0.1
1 A
+85° C,
V
SW
(differential) = -330 V to gnd
V
SW
(differential) =+270 V to -60 V
0.3
-40° C,
V
SW
(differential) = -310 V to gnd
V
SW
(differential) = +250 V to -60 V
0.1
On Resistance
I
SW
(on) = ±10 mA
+25° C
R
ON
-
35 -
+85° C 50 70
-40° C 26 -
DC current limit
V
SW
(on) = ±10 V
+25° C
I
SW
-160-
mA+85° C 80 110 -
-40° C - 210 250
Logic input to switch
output isolation
Logic inputs = GND
+25°C, V
SW
(T
TESTin
, R
TESTin
)=±320V
I
SW
-
0.1
1 A
+85°C, V
SW
(T
TESTin
, R
TESTin
)=±330V
0.3
-40°C, V
SW
(T
TESTin
, R
TESTin
)=±310V
0.1
dV/dt sensitivity
100V
PP
Square Wave, 100Hz
(Not production tested - limits are
guaranteed by design and quality
control sampling audits.)
-500-V/s
I
NTEGRATED
C
IRCUITS
D
IVISION
12 www.ixysic.com R05
CPC7593
1.7 Digital I/O Electrical Specifications
Parameter Test Conditions Symbol Minimum Typical Maximum Unit
Input Characteristics
Input voltage, Logic low Input voltage falling
V
IL
0.8 1.1 -
V
Input voltage, Logic high Input voltage rising
V
IH
-1.72.0
Input leakage current,
IN
RINGING
, IN
TESTin
,
and IN
TESTout
Logic high
V
DD
= 5.5 V, V
BAT
= -75 V, V
IH
= 2.4V I
IH
-0.11A
Input leakage current,
IN
RINGING
, IN
TESTin
,
and IN
TESTout
Logic low
V
DD
= 5.5 V, V
BAT
= -75 V, V
IL
= 0.4V I
IL
-0.11A
Input leakage current,
LATCH Logic high
V
DD
= 4.5 V, V
BAT
= -75 V, V
IH
= 2.4V I
IH
719-A
LATCH Pull-up
Minimum Load
V
DD
= 4.5 V, V
BAT
= -75 V, I
IN
= -10 A
Latch input transitions to logic high.
Logic = High True
Input leakage current,
LATCH Logic low
V
DD
= 5.5 V, V
BAT
= -75 V, V
IL
= 0.4V I
IL
- 47 125 A
Input leakage current,
T
SD
Logic high
V
DD
= 5.5 V, V
BAT
= -75 V, V
IH
= V
DD
I
IH
10 16 30 A
Input leakage current,
T
SD
Logic low
V
DD
= 5.5 V, V
BAT
= -75 V, V
IL
= 0.4V I
IL
10 16 30 A
Output Characteristics
Output voltage,
T
SD
Logic high
V
DD
= 5.5 V, V
BAT
= -75 V, I
TSD
= AV
TSD_off
2.4
V
DD
-V
Output voltage,
T
SD
Logic low
V
DD
= 5.5 V, V
BAT
= -75 V, I
TSD
= mA V
TSD_on
-00.4V
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

CPC7593ZA

Mfr. #:
Buy CPC7593ZA
Manufacturer:
IXYS Integrated Circuits
Description:
Switch ICs - Various 10-pole 20-pin SOIC LCAS
Lifecycle:
New from this manufacturer.
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